MAX11014 Datasheet, PDF (23/69 Pages) Maxim Integrated Products – Automatic RF MESFET Amplifier Drain-Current Controllers

Automatic RF MESFET Amplifier
Drain-Current Controllers
the ADC conversion register’s continuous convert bit
(CONCONV) is set to 1 and the current ADC conver-
sion includes a temperature channel. The temperature-
sensor circuits remain powered up until the CONCONV
bit is set low.
The external temperature sensor drive current ratio has
been optimized for a 2N3904 npn transistor with an ide-
ality factor of 1.0065. The nonideality offset is removed
internally by a preset digital coefficient. Using a transis-
tor with a different ideality factor produces a proportion-
ate difference in the absolute measured temperature.
For more details on this topic and others related to
using an external temperature sensor, see Application
Note 1057 “Compensating for Ideality Factor and
Series Resistance Differences between Thermal-Sense
Diodes” and Application Note 1944 “Temperature
Monitoring Using the MAX1253/54 and MAX1153/54”
on Maxim’s website: www.maxim-ic.com.
12-Bit DAC
The MAX11014/MAX11015 include two voltage-output,
12-bit monotonic DACs with ±1 LSB integral nonlineari-
ty error and ±0.4 LSB differential nonlinearity error. The
DAC operates from the internal +2.5V reference or an
external reference voltage supplied at REFDAC. When
using an external voltage reference, bypass REFDAC
with a 0.1µF capacitor to AGND. The REFDAC external
voltage range is +0.7V to +2.5V.
The MAX11014’s channel 1/channel 2 DACs set the
sense voltage between RCS_+ and RCS_- by control-
ling the GATE_ bias. See the MAX11014 Class A
Control Loop section. The MAX11015’s channel 1/chan-
nel 2 DACs drive the GATE_ outputs directly, indepen-
dent of the current-sense voltages, through the
gate-drive amplifier with a gain of -2. See the MAX11015
Class AB Control section.
Set the channel 1/channel 2 DAC code by writing to the
respective channel’s DAC input registers, DAC input
and output registers, or V_SET registers. Write to the
DAC input registers (Table 16) and use a subsequent
write to the software load DAC register (Table 21) to
control the timing of the update. Write to the DAC input
and output registers (Table 17) to set the DAC output
voltage code directly, independent of the software load
DAC register bits. Write to the V_SET registers (Table 14)
to include LUT data in the DAC code. Writing to the
V_SET registers triggers a V_DAC(CODE) calculation as
shown in the following equation:
V_DAC(CODE) = V_SET(CODE) = (1 + LUT_K [K] x LUT_TEMP [TEMP])
where
V_DAC(CODE) = The modified channel1/channel 2 12-bit
DAC code.
V_SET(CODE) = The 12-bit DAC code written to the chan-
nel 1/channel 2 V_SET registers.
LUT_K[K] = The interpolated, fractional 12-bit K LUT
value. The K LUT data is derived from a variety of
sources, including: the V_SET register value, the K para-
meter register value, or various ADC channels. See the
SRAM LUTs section.
LUT_TEMP[TEMP] = The interpolated, fractional 12-bit
two’s-complement temperature LUT value. The tempera-
ture LUT data is derived from either internal or external
temperature values. See the SRAM LUTs section.
The V_DAC(CODE) equation code is then loaded into the
DAC input register or DAC output register, depending
on the corresponding channel’s LDAC bit in the soft-
ware configuration register. See Table 11.
Self-Calibration
Calibrate channel 1 and channel 2 by writing
to the PGA calibration control register. The
MAX11014/MAX11015 function after power-up without
a calibration. However, for best performance after pow-
ering up, command a calibration by setting the TRACK
bit to 0 and the DOCAL bit to 1 (see Table 18).
Subsequently, set the TRACK, DOCAL, and SELFTIME
bits to 1 to minimize loss of performance over tempera-
ture and supply voltage.
The self-calibration algorithm cancels offsets at the
gate-drive amplifier inputs in approximately 95µV incre-
ments to improve accuracy. The self-calibration routine
can be commanded when the DACs are powered
down, but the results will not be accurate. For best
results, run the calibration after the DAC power-up time,
t_DPUEXT. The ADC’s operation is suspended during a
self-calibration. The end of the self-calibration routine is
indicated by the BUSY output returning low. See the
BUSY Output section. Wait until the end of the self-cali-
bration routine before requesting an ADC conversion.
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