MAX11166 Datasheet, PDF (24/33 Pages) Maxim Integrated Products – 16-Bit, 500ksps/250ksps, ±5V SAR ADCs with Internal Reference in TDFN

MAX11166/MAX11167
16-Bit, 500ksps/250ksps, ±5V SAR ADCs
with Internal Reference in TDFN
CS with Busy Indicator Mode
The CS with busy indicator mode is shown in Figure 8
where a single ADC is connected to a SPI-compatible
digital host with interrupt input. The corresponding timing
is given in Figure 9.
A rising edge on CNVST completes the acquisition, initi-
ates the conversion and forces DOUT to high impedance.
The conversion continues to completion irrespective of
the state of CNVST allowing CNVST to be used as a
select line for other devices on the board.
CNVST
tCNVPW
DIN
ACQUISITION
tSSCKCNF
SCLK
DOUT
tCONV
CONVERSION
tHSCKCNF
t_EN
tCYC
tACQ
ACQUISITION
tSCLKL
tSCLK
1
2
3
14
15
16
t_SCLKH
t_DDO
tDIS
D15
D14
D13
D1
D0
Figure 7. CS No Busy Indicator Mode Timing
CNVST
MAX11166
MAX11167
SCLK
DOUT
DIN
Figure 8. CS With Busy Indicator Mode Connection Diagram
OVDD
10kΩ
CONVERT
DIGITAL HOST
DATA IN
IRQ
CONFIG
CLK
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