MAX11043 Datasheet, PDF (24/33 Pages) Maxim Integrated Products – 4-Channel, 16-Bit, Simultaneous-Sampling ADCs with PGA, Filter, and 8-/12-Bit Dual-Stage DAC

4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
Flash Mode Register (18h)
BIT 7
FM2
(Flashmode2)
BIT 6
FM1
(Flashmode1)
BIT 5
FM0
(Flashmode0)
BIT 4
0
Write allowed only if flash busy bit is zero.
FM2:FM0<7:5>: Flash operation (default 0).
000 = no operation.
001 = write data in flash data in register to flash.
010 = erase data in the selected page.
011 = mass erase the flash.
100 = no operation.
101 = read data from flash into data out register.
BIT 3
X
BIT 2
X
BIT 1
X
110 = transfer data from flash to C-RAM.
111 = no operation.
Reserved<4>: Reserved. Set to 0.
X<3:1>: Don’t-care bits.
Flash busy<0>: Flash busy flag.
1 = flash busy.
0 = flash ready.
BIT 0
Flash busy
(read only)
Flash Address Register (19h)
BIT 15
X
BIT 14
X
BIT 13
X
BIT 12
X
BIT 11
X
BIT 10
PAGE2
BIT 9
PAGE1
BIT 8
PAGE0
BIT 7
ADR7
BIT 6
ADR6
BIT 5
ADR5
BIT 4
ADR5
Write allowed only if flash busy bit is zero (18h bit 0 or
status register) (default = 0).
X<15:11> : Don’t-care bits.
PAGE2:PAGE0<10:8>: Page selection.
000 = page 0 (default).
001 = page 1.
010 = page 2.
BIT 3
ADR3
BIT 2
ADR2
BIT 1
ADR1
BIT 0
ADR0
011 = page 3.
100 = page 4.
101 = page 5.
110 = page 6.
111 = page 7.
ADR7:ADR0<7:0>: Address pointer flash word con-
taining filter coefficients (default = 0).
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