MAX11043 Datasheet, PDF (18/33 Pages) Maxim Integrated Products – 4-Channel, 16-Bit, Simultaneous-Sampling ADCs with PGA, Filter, and 8-/12-Bit Dual-Stage DAC

4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
Table 2. SPI Register Map
ADDRESS
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
REGISTER NAME
ADCA
ADCB
ADCC
ADCD
ADCAB
ADCCD
ADCABCD
Status
Configuration
DAC
DACSTEP
DACH/DACL
ConfigA
ConfigB
ConfigC
ConfigD
Reference/Delay
AGain
BGain
CGain
DGain
15h
Filter coefficient address
16h
Filter coefficient data out
17h
Filter coefficient data in
18h
Flash mode
19h
Flash addr
1Ah
Flash data in
1Bh
Flash data out
1Ch
Reserved
1Dh
Reserved
1Eh
Reserved
1Fh
Reserved
Register Map
FUNCTION
ADC channel A result register
ADC channel B result register
ADC channel C result register
ADC channel D result register
ADC channels A and B results register
ADC channels C and D results register
ADC channels A, B, C, and D results register
Status register
Configures the device
Fine DAC value
Step size for DAC increment/decrement function
High and low coarse DAC values
ADC channel A configuration
ADC channel B configuration
ADC channel C configuration
ADC channel D configuration
Sets the operation state of the reference and buffers
Channel A fine gain
Channel B fine gain
Channel C fine gain
Channel D fine gain
Selects the filter coefficient to read or write. This autoincrements
each time the coefficient data register is accessed.
Coefficient RAMs output data
Filter coefficient data
Flash mode selection register
Flash address register
Flash data in register
Flash data out register
—
—
—
—
BITS
16/24
16/24
16/24
16/24
32/48
32/48
64/96
8
16
16
16
8+8
16
16
16
16
16
16
16
16
16
8
32
32
8
16
16
16
—
—
—
—
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