LTC3786_15 Datasheet, PDF (9/34 Pages) Linear Technology – Low IQ Synchronous Boost Controller

LTC3786
Pin Functions (MSOP/QFN)
FREQ (Pin 7/Pin 9): The Frequency Control Pin for the
Internal VCO. Connecting the pin to GND forces the VCO
to a fixed low frequency of 350kHz. Connecting the pin
to INTV_CC forces the VCO to a fixed high frequency of
535kHz. The frequency can be programmed from 50kHz
to 900kHz by connecting a resistor from the FREQ pin to
GND. The resistor and an internal 20µA source current
create a voltage used by the internal oscillator to set the
frequency. Alternatively, this pin can be driven with a DC
voltage to vary the frequency of the internal oscillator.
RUN (Pin 8/Pin 10): Run Control Input. Forcing this pin
below 1.28V shuts down the controller. Forcing this pin
below 0.7V shuts down the entire LTC3786, reducing
quiescent current to approximately 8µA. An external
resistor divider connected to V_IN can set the threshold
for converter operation. Once running, a 4.5µA current is
sourced from the RUN pin allowing the user to program
hysteresis using the resistor values.
GND (Pin 9, Exposed Pad Pin 17/ Pin 11, Exposed Pad
Pin 17): Ground. Connects to the source of the bottom
(main) N-channel MOSFET and the (–) terminal(s) of C_IN
and C_OUT . All small-signal components and compensa-
tion components should also connect to this ground.
The exposed pad must be soldered to the PCB for rated
thermal performance.
BG (Pin 10/Pin 12): Bottom Gate. Connect to the gate of
the main N-channel MOSFET.
INTV_CC (Pin 11/Pin 13): Output of Internal 5.4V LDO.
Power supply for control circuits and gate drivers. De-
couple this pin to GND with a minimum 4.7µF low ESR
ceramic capacitor.
VBIAS (Pin 12/Pin 14): Main Supply Pin. It is normally
tied to the input supply V_IN or to the output of the boost
converter. A bypass capacitor should be tied between this
pin and the GND pin. The operating voltage range on this
pin is 4.5V to 38V (40V abs max).
BOOST (Pin 13/Pin 15): Floating Power Supply for the
Synchronous MOSFET. Bypass to SW with a capacitor
and supply with a Schottky diode connected to INTV_CC.
TG (Pin 14/Pin 16): Top Gate. Connect to the gate of the
synchronous NMOS.
SW (Pin 15/Pin 1): Switch Node. Connect to the source
of the synchronous top MOSFET, the drain of the main
bottom MOSFET, and the inductor.
PGOOD (Pin 16/Pin 2): Power Good Indicator. Open-drain
logic output that is pulled to ground when the output volt-
age is more than ±10 % away from the regulated output
voltage. To avoid false trips the output voltage must be
outside of the range for 25µs before this output is activated.
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