LTC3786_15 Datasheet, PDF (16/34 Pages) Linear Technology – Low IQ Synchronous Boost Controller

LTC3786
Applications Information
Inductor Value Calculation
The operating frequency and inductor selection are in-
terrelated in that higher operating frequencies allow the
use of smaller inductor and capacitor values. Why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
of MOSFET gate charge and switching losses. Also, at
higher frequency, the duty cycle of body diode conduction
is higher, which results in lower efficiency. In addition to
this basic trade-off, the effect of inductor value on ripple
current and low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ∆I_L decreases with higher
inductance or frequency and increases with higher V_IN:
∆I_L
=
V_IN

1–
f •L_
V_IN
V_OUT



Accepting larger values of ∆I_L allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆I_L = 0.3(I_MAX). The maximum
∆I_L occurs at V_IN = 1/2 V_OUT .
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R_SENSE. Lower
inductor values (higher ∆I_L) will cause this to occur at
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease. Once the value of L is known, an
inductor with low DCR and low core losses should be
selected.
Power MOSFET Selection
Two external power MOSFETs must be selected for the
LTC3786: one N-channel MOSFET for the bottom (main)
switch, and one N-channel MOSFET for the top (synchro-
nous) switch.
The peak-to-peak gate drive levels are set by the INTV_CC
voltage. This voltage is typically 5.4V. Consequently, logic-
level threshold MOSFETs must be used in most applica-
tions. Pay close attention to the BV_DSS specification for
the MOSFETs as well; many of the logic level MOSFETs
are limited to 30V or less.
Selection criteria for the power MOSFETs include the on-
resistance, R_DS(ON), Miller capacitance, C_MILLER, input
voltage and maximum output current. Miller capacitance,
C_MILLER, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturer’s data
sheet. C_MILLER is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in V_DS. This result is
then multiplied by the ratio of the application applied V_DS
to the gate charge curve specified V_DS. When the IC is
operating in continuous mode, the duty cycles for the top
and bottom MOSFETs are given by:
Main Switch Duty Cycle = ^{VOUT – VIN}
V_OUT
Synchronous Switch Duty Cycle = ^VIN
V_OUT
If the maximum output current is I_OUT(MAX) and each chan-
nel takes one-half of the total output current, the MOSFET
power dissipations in each channel at maximum output
current are given by:
P_MAIN
=
(^V_OUT
– V_{IN )} V_OUT
V_IN2
•
I_OUT(MAX
2
)
• ₍1+ δ₎
• R_DS(ON)
+k
•
V_OUT3
• ^IOUT(MAX)
V_IN
• R_DR
• C_MILLER • f
( ) ^P_SYNC
=
V_IN
V_OUT
• I_OUT(MAX)2 •
1+ δ
• R_DS(ON)
where δ is the temperature dependency of R_DS(ON)
(approximately 1Ω) is the effective driver resistance at the
MOSFET’s Miller threshold voltage. The constant k, which
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