LTC3786_15 Datasheet, PDF (20/34 Pages) Linear Technology – Low IQ Synchronous Boost Controller

LTC3786
Applications Information
Table 2 summarizes the different states in which the FREQ
pin can be used.
Table 2
FREQ PIN
0V
INTV_CC
Resistor
Any of the Above
PLLIN/MODE PIN
DC Voltage
DC Voltage
DC Voltage
External Clock
FREQUENCY
350kHz
535kHz
50kHz to 900kHz
Phase Locked to External Clock
Minimum On-Time Considerations
Minimum on-time, t_ON(MIN), is the smallest time duration
that the LTC3786 is capable of turning on the bottom
MOSFET. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle applications may approach this minimum
on-time limit.
In forced continuous mode, if the duty cycle falls below
what can be accommodated by the minimum on-time,
the controller will begin to skip cycles but the output will
continue to be regulated. More cycles will be skipped when
V_IN increases. Once V_IN rises above V_OUT , the loop keeps
the top MOSFET continuously on. The minimum on-time
for the LTC3786 is approximately 110ns.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the greatest improvement. Percent efficiency
can be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, five main sources usually account for most of the
losses in LTC3786 circuits: 1) IC VBIAS current, 2) INTV_CC
regulator current, 3) I²R losses, 4) Bottom MOSFET transi-
tion losses and 5) Body diode conduction losses.
1. The VBIAS current is the DC supply current given in the
Electrical Characteristics table, which excludes MOSFET
driver and control currents. VBIAS current typically
results in a small (<0.1%) loss.
2. INTV_CC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOS-
FETs. Each time a MOSFET gate is switched from low to
high to low again, a packet of charge, dQ, moves from
INTV_CC to ground. The resulting dQ/dt is a current out
of INTV_CC that is typically much larger than the control
circuit current. In continuous mode, I_GATECHG = f(Q_T +
Q_B), where Q_T and Q_B are the gate charges of the topside
and bottom side MOSFETs.
3. DC I²R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board
traces and cause the efficiency to drop at high output
currents.
4. Transition losses apply only to the bottom MOSFET(s),
and become significant only when operating at low input
voltages. Transition losses can be estimated from:
Transition
Loss
=
(^1.7)
V_OUT3
V_IN
I_MAX
• C_RSS
•
f
5. Body diode conduction losses are more significant at
higher switching frequency. During the dead time, the loss
in the top MOSFETs is I_L • V_DS, where V_DS is around 0.7V.
At higher switching frequency, the dead time becomes
a good percentage of switching cycle and causes the
efficiency to drop.
Other hidden losses, such as copper trace and internal
battery resistances, can account for an additional efficiency
degradation in portable systems. It is very important to
include these system-level losses during the design phase.
3786fa
20