LTC3738 Datasheet, PDF (9/32 Pages) Linear Technology – 3-Phase Buck Controller for Intel VRM9/VRM10 with Active Voltage Positioning

LTC3738
PI FU CTIO S
SW1, SW2, SW3 (Pins 30, 27, 21): Switch Node Connec-
tions to Inductors. Voltage swing at these pins is from a
Schottky diode (external) voltage drop below ground to
V_IN (where V_IN is the external MOSFET supply rail).
TG1, TG2, TG3 (Pins 31, 28, 20): High Current Gate Drives
for Top N-Channel MOSFETs. These are the outputs of the
floating drivers with a voltage swing equal to the boost
voltage source superimposed on the switch node voltage
SW.
BOOST1, BOOST2, BOOST3 (Pins 32, 29, 19): Positive
Supply Pins to the Topside Floating Drivers. Bootstrapped
capacitors, charged with external Schottky diodes and a
boost voltage source are connected between the BOOST and
SW pins. Voltage swing at the BOOST pins is from the boost
source voltage (typically V_CC) to this boost source voltage
+V_IN (where V_IN is the external MOSFET supply rail).
PGOOD (Pin 33): This open-drain output is pulled low
when the output voltage is outside the PGOOD tolerance
window. PGOOD is blanked during VID transitions for
approximately 100µs.
VID0, VID1, VID2, VID3, VID4, VID5 (Pins 35, 36, 37, 17,
18, 34): Output Voltage Programming Input Pins. When
VID5 is tied to V_CC, the Intel VRM9 VID table is selected.
When voltage of VID5 is less than V_CC – 2V, VID5 serves
as the fifth VID bit of VRM10.
OUTEN (Pin 38): On/Off Control of the Controller.
SGND (Pin 39, Exposed Pad): Signal Ground. This pin
must be soldered to the ground plane.
3738f
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