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LTC3738 Datasheet, PDF (21/32 Pages) Linear Technology – 3-Phase Buck Controller for Intel VRM9/VRM10 with Active Voltage Positioning
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LTC3738
Table 2. VRM10 VID Table
PROCESSOR PINS (0 = LOW, 1 = HIGH)
VOUT
VID4 VID3 VID2 VID1 VID0 VID5
(V)
0
1
0
1
0
0
0.8375
0
1
0
0
1
1
0.8500
0
1
0
0
1
0
0.8625
0
1
0
0
0
1
0.8750
0
1
0
0
0
0
0.8875
0
0
1
1
1
1
0.9000
0
0
1
1
1
0
0.9125
0
0
1
1
0
1
0.9250
0
0
1
1
0
0
0.9375
0
0
1
0
1
1
0.9500
0
0
1
0
1
0
0.9625
0
0
1
0
0
1
0.9750
0
0
1
0
0
0
0.9875
0
0
0
1
1
1
1.0000
0
0
0
1
1
0
1.0125
0
0
0
1
0
1
1.0250
0
0
0
1
0
0
1.0375
0
0
0
0
1
1
1.0500
0
0
0
0
1
0
1.0625
0
0
0
0
0
1
1.0750
0
0
0
0
0
0
1.0875
1
1
1
1
1
1
Off*
1
1
1
1
1
0
Off*
1
1
1
1
0
1
1.1000
1
1
1
1
0
0
1.1125
1
1
1
0
1
1
1.1250
1
1
1
0
1
0
1.1375
1
1
1
0
0
1
1.1500
1
1
1
0
0
0
1.1625
1
1
0
1
1
1
1.1750
1
1
0
1
1
0
1.1875
1
1
0
1
0
1
1.2000
*Output disabled—same as deasserting the Output Enable input
PROCESSOR PINS (0 = LOW, 1 = HIGH)
VID4 VID3 VID2 VID1 VID0 VID5
1
1
0
1
0
0
1
1
0
0
1
1
1
1
0
0
1
0
1
1
0
0
0
1
1
1
0
0
0
0
1
0
1
1
1
1
1
0
1
1
1
0
1
0
1
1
0
1
1
0
1
1
0
0
1
0
1
0
1
1
1
0
1
0
1
0
1
0
1
0
0
1
1
0
1
0
0
0
1
0
0
1
1
1
1
0
0
1
1
0
1
0
0
1
0
1
1
0
0
1
0
0
1
0
0
0
1
1
1
0
0
0
1
0
1
0
0
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
0
0
1
1
1
0
1
0
1
1
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
0
1
1
0
0
1
0
1
1
0
0
0
0
1
0
1
1
1
0
1
0
1
1
0
0
1
0
1
0
1
VOUT
(V)
1.2125
1.2250
1.2375
1.2500
1.2625
1.2750
1.2875
1.3000
1.3125
1.3250
1.3375
1.3500
1.3625
1.3750
1.3875
1.4000
1.4125
1.4250
1.4375
1.4500
1.4625
1.4750
1.4875
1.5000
1.5125
1.5250
1.5375
1.5500
1.5625
1.5750
1.5875
1.6000
the internal current limit is increased from 0V/RSENSE to
75mV/RSENSE. The output current limit ramps up slowly,
taking 1.6s/µF to reach full current. The output current
thus ramps up slowly, eliminating the starting surge
current required from the input power supply.
( ) tIRAMP
=
2.4V – 0V
1.5µA
CSS
=
1.6s/µF
CSS
The SS pin has an internal 6V zener clamp (see the
Functional Diagram).
Fault Conditions: Overcurrent Latchoff
The SS pin also provides the ability to latch off the
controllers when an overcurrent condition is detected. The
SS capacitor is used initially to limit the inrush current of
all three output stages. After the controllers have been
3738f
21
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