LTC4015_15 Datasheet, PDF (67/76 Pages) Linear Technology – Multichemistry Buck Battery Charger Controller with Digital Telemetry System

LTC4015
DETAILED Register Descriptions
ntc_pause (Sub-Address 0x34, Bit 5, R)
This bit indicates that the LTC4015 is in thermistor pause state due to NTC_RATIO out of range as set by the JEITA_Tn
values. See the section JEITA Temperature Qualified Charging (applies to lithium chemistries only).
timer_term (Sub-Address 0x34, Bit 4, R)
This bit indicates that the LTC4015 is in timer termination state due to battery being at the vcharge voltage for more
than MAX_CV_TIME (applies to lithium chemistries only).
c_over_x_term (Sub-Address 0x34, Bit 3, R)
This bit indicates that the LTC4015 is in C/x termination state due to IBAT dropping below C_OVER_X_THRESHOLD
(applies to lithium chemistries only).
max_charge_time_fault (Sub-Address 0x34, Bit 2, R)
This bit indicates that the LTC4015 is in max charge time fault state due to MAX_CHARGE_TIMER exceeding
MAX_CHARGE_TIME during a charge cycle (applies to lithium chemistries only).
bat_missing_fault (Sub-Address 0x34, Bit 1, R)
This bit indicates that the LTC4015 is in battery missing fault state due to no battery detected.
bat_short_fault (Sub-Address 0x34, Bit 0, R)
This bit indicates that the LTC4015 is in battery short fault state due to a shorted battery detected.
CHARGE_STATUS (Sub-Address 0x35, Bits 3:0, R)
This register consists of individual status bits which indicate status of the battery charge current control circuitry.
Individual bits are mutually exclusive (a maximum of one bit is asserted at any given time).
vin_uvcl_active (Sub-Address 0x35, Bit 3, R)
This bit indicates that the UVCLFB pin of the undervoltage current limit loop of the LTC4015 is in control of the
switching charger current delivery based on VIN_UVCL_SETTING.
iin_limit_active (Sub-Address 0x35, Bit 2, R)
This bit indicates that the input current regulation loop of the LTC4015 is in control of the switching charger current
delivery based on IIN_LIMIT_SETTING.
constant_current (Sub-Address 0x35, Bit 1, R)
This bit indicates that the battery charge current regulation loop of the LTC4015 is in control of the switching
charger current delivery based on ICHARGE_DAC.
constant_voltage (Sub-Address 0x35, Bit 0, R)
This bit indicates that the battery voltage regulation loop of the LTC4015 is in control of the switching charger
current delivery based on VCHARGE_DAC.
LIMIT_ALERTS (Sub-Address 0x36, Bits 15:0, R/Clear)
This register consists of individual alert bits which can optionally indicate that limit excursions have caused an SMBALERT
to occur. The LTC4015 checks for new limits excursions at the end of every A/D measurement system cycle (approximately
6.5ms), and LIMIT_ALERTS is updated accordingly. Individual alert bits are enabled by EN_LIMIT_ALERTS.
Once asserted, alert bits remain high until disabled or cleared. Writing a 0 to any bit clears that alert. If an enabled
alert is cleared and the alerting condition remains, a new alert is triggered immediately. When a new alert occurs, the
LTC4015 pulls down the SMBALERT pin and holds it low until it completes a response to an alert response algorithm
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