LTC3728LCGN-PBF Datasheet, PDF (28/38 Pages) Linear Technology – Dual, 550kHz, 2-Phase Synchronous Regulators

LTC3728L/LTC3728LX
Applications Information
Design Example
As a design example for one channel, assume V_IN = 12V
(nominal), V_IN = 22V(max), V_OUT = 1.8V, I_MAX = 5A and
f = 300kHz.
The inductance value is chosen first based on a 30% ripple
current assumption. The highest value of ripple current
occurs at the maximum input voltage. Tie the PLLFLTR
pin to a resistive divider from the INTV_CC pin, generating
0.7V for 300kHz operation. The minimum inductance for
30% ripple current is:
∆I_L
=
V_OUT
(f)(L)


1–
V_OUT
V_IN


A 4.7µH inductor will produce 23% ripple current and a
3.3µH will result in 33%. The peak inductor current will be
the maximum DC value plus one half the ripple current, or
5.84A, for the 3.3µH value. Increasing the ripple current will
also help ensure that the minimum on-time of 200ns is not
violated. The minimum on-time occurs at maximum V_IN:
t_ON(MIN)
=
V_OUT
V_{IN(MAX )}f
=
1.8V
22V(300kHz)
=
273ns
The R_SENSE resistor value can be calculated by using the
maximum current sense voltage specification with some
accommodation for tolerances:
R_SENSE
≤
60mV
5.84A
≈
0.01Ω
Since the output voltage is below 2.4V, the output resistive
divider will need to be sized to not only set the output voltage
but also to absorb the SENSE pin’s specified input current.
R1_{(MAX )}
=
24k


0.8V
2.4V – V_OUT


=
24k


0.8V
2.4V – 1.8V


=
32k
Choosing 1% resistors: R1 = 25.5k and R2 = 32.4k yields
an output voltage of 1.816V.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Fairchild FDS6982S dual MOSFET
results in: R_DS(ON) = 0.035Ω/0.022Ω, C_MILLER = 215pF. At
maximum input voltage with T(estimated) = 50°C:
P_MAIN
=
1.8V
22V
(5)²
[¹⁺
(0.005)(50°C
–
25°C)_]
•
(0.035Ω
)
+
(22V
)²


5A
2


(
4Ω)(215pF
)
•


5
1
– 2.3
+
1
2.3
_(300kHz
)
=
332mW
A short-circuit to ground will result in a folded back
current of:
I_SC
=
25mV
0.01Ω
–
1
2 
120ns(22V)
3.3µH 
=
2.1A
with a typical value of R_DS(ON) and d = (0.005/°C)(20) = 0.1.
The resulting power dissipated in the bottom MOSFET is:
P_SYNC
=
22V – 1.8V
22V
(2.1A)²
(1.125)(0.022Ω)
= 100mW
which is less than under full-load conditions.
C_IN is chosen for an RMS current rating of at least 3A at
temperature assuming only this channel is on. C_OUT is
chosen with an ESR of 0.02Ω for low output ripple. The
output ripple in continuous mode will be highest at the
maximum input voltage. The output voltage ripple due to
ESR is approximately:
V_ORIPPLE = R_ESR (∆I_L) = 0.02Ω(1.67A) = 33mV_P–P
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