LTC3728LCGN-PBF Datasheet, PDF (21/38 Pages) Linear Technology – Dual, 550kHz, 2-Phase Synchronous Regulators

LTC3728L/LTC3728LX
applications information
4. EXTV_CC Connected to an Output-Derived Boost Network.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTV_CC to an
output-derived voltage that has been boosted to greater
than 4.7V. This can be done with either the inductive
boost winding as shown in Figure 6a or the capacitive
charge pump shown in Figure 6b. The charge pump has
the advantage of simple magnetics.
Topside MOSFET Driver Supply (C_B, D_B)
External bootstrap capacitors C_B connected to the BOOST
pins supply the gate drive voltages for the topside MOS-
FETs. Capacitor C_B in the Functional Diagram is charged
though external diode D_B from INTV_CC when the SW pin
is low. When one of the topside MOSFETs is to be turned
on, the driver places the C_B voltage across the gate-source
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage, SW,
rises to V_IN and the BOOST pin follows. With the topside
MOSFET on, the boost voltage is above the input supply:
V_BOOST = V_IN + V_INTVCC. The value of the boost capacitor
C_B needs to be 100 times that of the total input capacitance
of the topside MOSFET(s). The reverse breakdown of the
external Schottky diode must be greater than V_IN(MAX).
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
Output Voltage
The output voltages are each set by an external feedback
resistive divider carefully placed across the output capaci-
tor. The resultant feedback signal is compared with the
internal precision 0.800V voltage reference by the error
amplifier. The output voltage is given by the equation:
V_OUT
=
0.8V


1+
R2 _
R1^
where R1 and R2 are defined in Figure 2.
SENSE⁺/SENSE^– Pins
The common mode input range of the current comparator
sense pins is from 0V to (1.1)INTV_CC. Continuous linear
operation is guaranteed throughout this range allowing
output voltage setting from 0.8V to 7.7V, depending upon
the voltage applied to EXTV_CC. A differential NPN input
stage is biased with internal resistors from an internal 2.4V
source, as shown in the Functional Diagram. This requires
that current either be sourced or sunk from the SENSE
pins depending on the output voltage. If the output voltage
is below 2.4V, current will flow out of both SENSE pins to
the main output. The output can be easily preloaded by
the V_OUT resistive divider to compensate for the current
comparator’s negative input bias current. The maximum
current flowing out of each pair of SENSE pins is:
I_SENSE+ + I_SENSE– = (2.4V – V_OUT)/24k
OPTIONAL EXTV_CC
CONNECTION
5V < V_SEC < 7V
V_IN
+
V_IN
LTC3728L/
LTC3728LX
TG1
N-CH
EXTV_CC
SW
R6
FCB
BG1
R5
SGND
N-CH
PGND
C_IN
BAT 85
T1
1:N
V_SEC
+
R_SENSE
1µF
V_OUT
+
C_OUT
3728 F06a
Figure 6a. Secondary Output Loop and EXTV_CC Connection
V_IN
+
C_IN
V_IN
LTC3728L/
LTC3728LX
TG1
EXTV_CC
N-CH
SW
BG1
N-CH
PGND
+
1µF
BAT85
0.22µF
BAT85
VN2222LL
R_SENSE
L1
BAT85
V_OUT
+
C_OUT
3728 F06b
Figure 6b. Capacitive Charge Pump for EXTV_CC
3728lxff
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