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LTC3728LCGN-PBF Datasheet, PDF (16/38 Pages) Linear Technology – Dual, 550kHz, 2-Phase Synchronous Regulators
LTC3728L/LTC3728LX
Applications Information
Figure 1 on the first page is a basic LTC3728L/LTC3728LX
application circuit. External component selection is driven
by the load requirement, and begins with the selection of
RSENSE and the inductor value. Next, the power MOSFETs
and D1 are selected. Finally, CIN and COUT are selected.
The circuit shown in Figure 1 can be configured for
operation up to an input voltage of 28V (limited by the
external MOSFETs).
RSENSE Selection for Output Current
RSENSE is chosen based on the required output current. The
current comparator has a maximum threshold of 75mV/
RSENSE and an input common mode range of SGND to
1.1(INTVCC). The current comparator threshold sets the
peak of the inductor current, yielding a maximum average
output current IMAX equal to the peak value less half the
peak-to-peak ripple current, ∆IL.
Allowing a margin for variations in the IC and external
component values yields:
RSENSE
=
50mV
IMAX
Because of possible PCB layout-induced noise in the
current sensing loop, the AC current sensing ripple of
∆VSENSE = ∆I • RSENSE also needs to be checked in the
design to get good signal-to-noise ratio. In general, for
a reasonably good PCB layout, a 15mV ∆VSENSE voltage
is recommended as a conservative design starting point.
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to the
internal compensation required to meet stability criterion
for buck regulators operating at greater than 50% duty
factor. A curve is provided to estimate this reduction in
peak output current level depending upon the operating
duty factor.
Operating Frequency
The IC uses a constant-frequency, phase-lockable ar-
chitecture with the frequency determined by an internal
capacitor. This capacitor is charged by a fixed current plus
an additional current which is proportional to the voltage
applied to the PLLFLTR pin. Refer to Phase-Locked Loop
16
2.5
2.0
1.5
1.0
0.5
0
200
300
400
500
600
OPERATING FREQUENCY (kHz)
3728 F05
Figure 5. PLLFLTR Pin Voltage vs Frequency
and Frequency Synchronization in the Applications Infor-
mation section for additional information.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 5. As the operating frequency
is increased the gate charge losses will be higher, reducing
efficiency (see Efficiency Considerations). The maximum
switching frequency is approximately 550kHz.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ∆IL decreases with higher
inductance or frequency and increases with higher VIN:
∆IL
=
1
(f)(L)
VOUT


1–
VOUT
VIN


Accepting larger values of ∆IL allows the use of low in-
ductances, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting
ripple current is ∆I = 30% of maximum output current or
higher for good load transient response and sufficient
ripple current signal in the current loop.
3728lxff