LTC3728LCGN-PBF Datasheet, PDF (22/38 Pages) Linear Technology – Dual, 550kHz, 2-Phase Synchronous Regulators

LTC3728L/LTC3728LX
Applications Information
Since V_OSENSE is servoed to the 0.8V reference voltage,
we can choose R1 in Figure 2 to have a maximum value
to absorb this current.
R1_{(MAX )}
=
24k


0.8V
2.4V – V_OUT


for V_OUT < 2.4V
Regulating an output voltage of 1.8V, the maximum value
of R1 should be 32k. Note that for an output voltage above
2.4V, R1 has no maximum value necessary to absorb the
sense currents; however, R1 is still bounded by the V_OSENSE
feedback current.
Soft-Start/Run Function
The RUN/SS1 and RUN/SS2 pins are multipurpose pins
that provide a soft-start function and a means to shut down
the LTC3728L/LTC3728LX. Soft-start reduces the input
power source’s surge currents by gradually increasing the
controller’s current limit (proportional to V_ITH). This pin
can also be used for power supply sequencing.
An internal 1.2µA current source charges up the C_SS
capacitor_. When the voltage on RUN/SS1 (RUN/SS2)
reaches 1.5V, the particular controller is permitted to start
operating. As the voltage on RUN/SS increases from 1.5V
to 3.0V, the internal current limit is increased from 25mV/
R_SENSE to 75mV/R_SENSE. The output current limit ramps up
slowly, taking an additional 1.25s/µF to reach full cur-
rent. The output current thus ramps up slowly, reducing
the starting surge current required from the input power
supply. If RUN/SS has been pulled all the way to ground
there is a delay before starting of approximately:
t_DELAY
=
1.5V
1.2µA
C_SS
=
(1.25s
/
µF )C_SS
t_IRAMP
=
3V − 1.5V
1.2µA
C_SS
=
(1.25s
/
µF )C_SS
By pulling both RUN/SS pins below 1V, the IC is put into
low current shutdown (I_Q = 20µA). The RUN/SS pins
can be driven directly from logic, as shown in Figure 7.
Diode, D1, in Figure 7 reduces the start delay but allows
C_SS to ramp up slowly providing the soft-start function.
22
Each RUN/SS pin has an internal 6V Zener clamp (see the
Functional Diagram).
V_IN
3.3V OR 5V
RUN/SS
D1
R_SS*
C_SS
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
3728 F07
Figure 7. RUN/SS Pin Interfacing
Fault Conditions: Overcurrent Latchoff
The RUN/SS pins also provide the ability to latch off the
controller(s) when an overcurrent condition is detected.
The RUN/SS capacitor, C_SS, is used initially to turn on
and limit the inrush current. After the controller has been
started and been given adequate time to charge up the
output capacitor and provide full load current, the RUN/SS
capacitor is used for a short-circuit timer. If the regulator’s
output voltage falls to less than 70% of its nominal value
after C_SS reaches 4.1V, C_SS begins discharging on the as-
sumption that the output is in an overcurrent condition. If
the condition lasts for a long enough period as determined
by the size of the C_SS and the specified discharge current,
the controller will be shut down until the RUN/SS pin volt-
age is recycled. If the overload occurs during start-up, the
time can be approximated by:
t_LO1 ≈ [C_SS(4.1 – 1.5 + 4.1 – 3.5)]/(1.2µA)
= 2.7 • 10⁶ (C_SS)
If the overload occurs after start-up the voltage on C_SS will
begin discharging from the Zener clamp voltage:
t_LO2 ≈ [C_SS (6 – 3.5)]/(1.2µA) = 2.1 • 10⁶ (C_SS)
This built-in overcurrent latchoff can be overridden by
providing a pull-up resistor to the RUN/SS pin, as shown
in Figure 7. This resistance shortens the soft-start period
and prevents the discharge of the RUN/SS capacitor
during an over current condition. Tying this pull-up resis-
tor to V_IN, as in Figure 7, defeats overcurrent latchoff.
Why should you defeat overcurrent latchoff? During the
prototyping stage of a design, there may be a problem
3728lxff