LTC3728LCGN-PBF Datasheet, PDF (18/38 Pages) Linear Technology – Dual, 550kHz, 2-Phase Synchronous Regulators

LTC3728L/LTC3728LX
Applications Information
where d is the temperature dependency of R_DS(ON) and
R_DR (approximately 4Ω) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V_TH(MIN) is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I²R losses while the topside N‑channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V_IN < 20V
the high current efficiency generally improves with larger
MOSFETs, while for V_IN > 20V the transition losses rapidly
increase to the point that the use of a higher R_DS(ON) device
with lower C_MILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1 + d) is generally given for a MOSFET in the
form of a normalized R_DS(ON) vs Temperature curve, but
d = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The Schottky diode, D1, shown in Figure 1 conducts during
the dead time between the conduction of the two power
MOSFETs. This prevents the body diode of the bottom
MOSFET from turning on, storing charge during the dead
time and requiring a reverse-recovery period that could
cost as much as 3% in efficiency at high V_IN. A 1A to 3A
Schottky is generally a good compromise for both regions
of operation due to the relatively small average current.
Larger diodes result in additional transition losses due to
their larger junction capacitance.
C_IN and C_OUT Selection
The selection of C_IN is simplified by the multiphase ar-
chitecture and its impact on the worst-case RMS current
drawn through the input network (battery/fuse/capacitor).
It can be shown that the worst-case RMS current occurs
when only one controller is operating. The controller
with the highest (V_OUT)(I_OUT) product needs to be used
in the subsequent formula to determine the maximum
RMS current requirement. Increasing the output current,
drawn from the other out-of-phase controller, will actually
decrease the input RMS ripple current from this maximum
value (see Figure 4). The out-of-phase technique typically
reduces the input capacitor’s RMS ripple current by a
18
factor of 30% to 70% when compared to a single phase
power supply solution.
The type of input capacitor, value and ESR rating have
efficiency effects that need to be considered in the selec-
tion process. The capacitance value chosen should be
sufficient to store adequate charge to keep high peak
battery currents down. 20µF to 40µF is usually sufficient
for a 25W output supply operating at 200kHz. The ESR of
the capacitor is important for capacitor power dissipation
as well as overall battery efficiency. All of the power (RMS
ripple current • ESR) not only heats up the capacitor but
wastes power from the battery.
Medium voltage (20V to 35V) ceramic, tantalum, OS-CON
and switcher-rated electrolytic capacitors can be used
as input capacitors, but each has drawbacks: ceramic
voltage coefficients are very high and may have audible
piezoelectric effects; tantalums need to be surge-rated;
OS-CONs suffer from higher inductance, larger case size
and limited surface-mount applicability; electrolytics’
higher ESR and dryout possibility require several to be
used. Multiphase systems allow the lowest amount of
capacitance overall. As little as one 22µF or two to three
10µF ceramic capacitors are an ideal choice in a 20W to
35W power supply due to their extremely low ESR. Even
though the capacitance at 20V is substantially below their
rating at zero-bias, very low ESR loss makes ceramics
an ideal candidate for highest efficiency battery operated
systems. Also consider parallel ceramic and high quality
electrolytic capacitors as an effective means of achieving
ESR and bulk capacitance goals.
In continuous mode, the source current of the top N‑channel
MOSFET is a square wave of duty cycle V_OUT/V_IN. To prevent
large voltage transients, a low ESR input capacitor sized
for the maximum RMS current of one channel must be
used. The maximum RMS capacitor current is given by:
( ) _{CIN RequiredIRMS ≈ IMAX} ^V_OUT
V_IN − V_OUT
V_IN
^1/2
This formula has a maximum at V_IN = 2V_OUT , where I_RMS
= I_OUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s ripple
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