LTC3864 Datasheet, PDF (19/28 Pages) Linear Technology – 60V Low IQ Step-Down DC/DC Controller with 100% Duty Cycle Capability

LTC3864
APPLICATIONS INFORMATION
Minimum On-Time Considerations
The minimum on-time, t_ON(MIN), is the smallest time
duration that the LTC3864 is capable of turning on the
power MOSFET, and is typically 220ns. It is determined
by internal timing delays and the gate charge required to
turn on the MOSFET. Low-duty-cycle applications may
approach this minimum on-time limit, so care should be
taken to ensure that:
t _ON(MIN) <
V_OUT
V_IN(MAX)
•
f
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will skip cycles.
However, the output voltage will continue to regulate.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
the dominant contributors and therefore where efficiency
improvements can be made. Percent efficiency can be
expressed as:
% Efficiency = 100% - (L1+L2+L3+…)
where L1, L2, L3, etc., are the individual losses as a per-
centage of input power.
Although all dissipative elements in the circuit produce
losses, four main sources account for most of the losses
in LTC3864 application circuits.
1. I²R Loss: I²R losses result from the P-channel MOSFET
resistance, inductor resistance, the current sense resis-
tor, and input and output capacitor ESR. In continuous
mode operation the average output current flows through
L but is chopped between the P-channel MOSFET and
the bottom side Schottky diode. The following equation
may be used to determine the total I²R loss:
P_I2R≈(I^2OUT + ∆I^2L/12) •[ R_DCR+D•(R_DS(ON)+R_SENSE
+ R_ESR(CIN))]+∆I^2L/ 12 • R_ESR(COUT)
2. Transition Loss: Transition loss of the P-channel MOS-
FET becomes significant only when operating at high
input voltages (typically 20V or greater.) The P-channel
transition losses (P_MOSTRL) can be determined from the
following equation:
P_PMOSTRL
=
V_IN2
•


I_OUT
2


•
(C_MILLER)
•

 ^{( V}IN
–
R_DN
V_CAP) –
V_MILLER
+
R_UP
V_MILLER


•
f
3. Gate Charging Loss: Charging and discharging the gate
of the MOSFET will result in an effective gate charg-
ing current. Each time the P-channel MOSFET gate is
switched from low to high and low again, a packet of
charge dQ moves from the capacitor across V_IN – V_CAP
and is then replenished from ground by the internal V_CAP
regulator. The resulting dQ/dt current is a current out
of V_IN flowing to ground. The total power loss in the
controller including gate charging loss is determined
by the following equation:
P_CNTRL = V_IN • (I_Q + f •Q_G(PMOSFET))
4. Schottky Loss: The Schottky diode loss is most signifi-
cant at low duty factors (high step down ratios). The
critical component is the Schottky forward voltage as
a function of junction temperature and current. The
Schottky power loss is given by the equation below.
P_DIODE ≅ (1–D)•I_OUT • V_F(IOUT,TJ)
When making adjustments to improve efficiency, the in-
put current is the best indicator of changes in efficiency.
If changes cause the input current to decrease, then the
efficiency has increased. If there is no change in input
current, there is no change in efficiency.
OPTI-LOOP^® Compensation
OPTI-LOOP compensation, through the availability of the
ITH pin, allows the transient response to be optimized for
a wide range of loads and output capacitors. The ITH pin
not only allows optimization of the control loop behavior
3864f
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