LTC3864 Datasheet, PDF (15/28 Pages) Linear Technology – 60V Low IQ Step-Down DC/DC Controller with 100% Duty Cycle Capability

LTC3864
APPLICATIONS INFORMATION
generated by forcing a constant current out of the gate of a
common-source connected P-MOSFET that is loaded with
a resistor, and then plotting the gate voltage versus time.
The initial slope is the effect of the gate-to-source and
gate-to-drain capacitances. The flat portion of the curve
is the result of the Miller multiplication effect of the drain-
to-gate capacitance as the drain voltage rises across the
resistor load. The Miller charge (the increase in coulombs
on the horizontal axis from a to b while the curve is flat) is
specified for a given V_SD test voltage, but can be adjusted
for different V_SD voltages by multiplying by the ratio of
the adjusted V_SD to the curve specified V_SD value. A way
to estimate the C_MILLER term is to take the change in gate
charge from points a and b (or the parameter Q_GD on a
manufacturer’s data sheet) and dividing it by the specified
V_SD test voltage, V_SD(TEST).
C_MILLER
≅
Q_GD
V_SD(TEST)
The term with C_MILLER accounts for transition loss, which
is highest at high input voltages. For V_IN < 20V, the high-
current efficiency generally improves with larger MOSFETs,
while for V_IN > 20V, the transition losses rapidly increase
to the point that the use of a higher R_DS(ON) device with
lower C_MILLER actually provides higher efficiency.
Schottky Diode Selection
When the P-MOSFET is turned off, a power Schottky diode
is required to function as a commutating diode to carry the
inductor current. The average diode current is therefore
dependent on the P-MOSFET’s duty factor. The worst case
condition for diode conduction is a short-circuit condition
where the Schottky must handle the maximum current
as its duty factor approaches 100% (and the P-channel
MOSFET’s duty factor approaches 0%). The diode there-
fore must be chosen carefully to meet worst case voltage
and current requirements. The equation below describes
the continuous or average forward diode current rating
required, where D is the regulator duty factor.
I_F(AVG) ≅ I_OUT(MAX) •(1–D)
Once the average forward diode current is calculated,
the power dissipation can be determined. Refer to the
Schottky diode data sheet for the power dissipation
P_DIODE as a function of average forward current I_F(AVG).
P_DIODE can also be iteratively determined by the two
equations below, where V_F(IOUT, _TJ) is a function of both
I_F(AVG) and junction temperature T_J. Note that the thermal
resistance θ_JA(DIODE) given in the data sheet is typical and
can be highly layout dependent. It is therefore important
to make sure that the Schottky diode has adequate heat
sinking.
T_J ≅ P_DIODE • θ_JA(DIODE)
P_DIODE ≅ I_F(AVG)• V_F(IOUT,TJ)
The Schottky diode forward voltage is a function of both
I_F(AVG) and T_J, so several iterations may be required to
satisfy both equations. The Schottky forward voltage V_F
should be taken from the Schottky diode data sheet curve
showing Instantaneous Forward Voltage. The forward
voltage will increase as a function of both T_J and I_F(AVG).
The nominal forward voltage will also tend to increase as
the reverse breakdown voltage increases. It is therefore
advantageous to select a Schottky diode appropriate to
the input voltage requirements.
C_IN and C_OUT Selection
The input capacitance C_IN is required to filter the square
wave current through the P-channel MOSFET. Use a low
ESR capacitor sized to handle the maximum RMS current.
I_CIN(RMS)
≅
I_OUT(MAX)
•
V_OUT
V_IN
•
V_{IN – 1}
V_OUT
The formula has a maximum at V_IN = 2V_OUT, where
I_CIN(RMS) = I_OUT(MAX)/2. This simple worst-case condition
is commonly used for design because even significant
deviations do not offer much relief. Note that ripple cur-
rent ratings from capacitor manufacturers are often based
on only 2000 hours of life, which makes it advisable to
derate the capacitor.
The selection of C_OUT is primarily determined by the ESR
required to minimize voltage ripple and load step transients.
The ∆V_OUT is approximately bounded by:
∆V_OUT
≤
∆I_L
_ESR

+
8
•
f
1
• C_OUT


3864f
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