LTC3869-2_15 Datasheet, PDF (15/42 Pages) Linear Technology – Dual, 2-Phase Synchronous Step-Down DC/DC Controllers

LTC3869/LTC3869-2
Applications Information
For previous generation current mode controllers, the
maximum sense voltage was high enough (e.g., 75mV for
the LTC1628 / LTC3728 family) that the voltage drop across
the parasitic inductance of the sense resistor represented
a relatively small error. For today’s highest current density
solutions, however, the value of the sense resistor can be
less than 1mΩ and the peak sense voltage can be as low
as 20mV. In addition, inductor ripple currents greater than
50% with operation up to 1MHz are becoming more com-
mon. Under these conditions the voltage drop across the
sense resistor’s parasitic inductance is no longer negligible.
A typical sensing circuit using a discrete resistor is shown
in Figure 2a. In previous generations of controllers, a small
RC filter placed near the IC was commonly used to reduce
the effects of capacitive and inductive noise coupled in
the sense traces on the PCB. A typical filter consists of
two series 10Ω resistors connected to a parallel 1000pF
capacitor, resulting in a time constant of 20ns.
This same RC filter, with minor modifications, can be
used to extract the resistive component of the current
sense signal in the presence of parasitic inductance.
For example, Figure 3 illustrates the voltage waveform
across a 2mΩ sense resistor with a 2010 footprint for the
1.2V/15A converter operating at 100% load. The waveform
is the superposition of a purely resistive component and a
purely inductive component. It was measured using two
scope probes and waveform math to obtain a differential
measurement. Based on additional measurements of the
inductor ripple current and the on-time and off-time of
the top switch, the value of the parasitic inductance was
determined to be 0.5nH using the equation:
ESL = ^{VESL(STEP) tON • tOFF}
∆I_L t_ON + t_OFF
V_IN
INTV_CC
BOOST
TG
SW
LTC3869
BG
PGND
SENSE⁺
SENSE^–
SGND
3869 F02a
R_F
C_F
R_F
FILTER COMPONENTS
PLACED NEAR SENSE PINS
V_IN
SENSE RESISTOR
PLUS PARASITIC
INDUCTANCE
R_S ESL
V_OUT
C_F • 2_RF ≤ ESL/R_S
POLE-ZERO
CANCELLATION
(2a) Using a Resistor to Sense Current
V_IN
V_IN
INTV_CC
BOOST
TG
SW
LTC3869
BG
PGND
SENSE⁺
SENSE^–
SGND
R1**
C1* R2
INDUCTOR
L DCR
V_OUT
*PLACE C1 NEAR SENSE⁺,
SENSE^– PINS
R1||R2 × C1 =
L
DCR
R_SENSE(EQ) = DCR
R2
R1 + R2
**PLACE R1 NEXT TO
INDUCTOR
(2b) Using the Inductor DCR to Sense Current
3869 F02b
Figure 2. Two Different Methods of Sensing Current
For more information www.linear.com/LTC3869
38692fa
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