LTC3875_15 Datasheet, PDF (14/44 Pages) Linear Technology – Dual, 2-Phase, Synchronous Controller with Low Value DCR Sensing and Temperature Compensation

LTC3875
Operation
(see Figure 4b for inductor DCR sensing connections). The
filter time constant, R1 • C1, of the SNSD⁺ should match the
L/DCR of the output inductor, while the filter at SNSA⁺ should
have a bandwidth of five times larger than that of SNSD⁺,
i.e, R2 • C2 equals one-fifth of R1 • C1.
Thermal Balancing For Multiphase Operation
When LTC3875 is used as a single output multiphase
converter, the temperature of the whole system can be
balanced by enabling the thermal balancing function. This
prevents hot spots due to imperfection of current match-
ing and component mismatch. Therefore, it improves the
overall reliability of the power supply system.
Refer to Figure 2 for the following discussion of thermal
balancing for the LTC3875.
The thermal balancing can be enabled by setting the
ENTMPB pin to ground. Each channel has a TCOMP/ITEMP
pin which sources a 30µA precision current. By connecting
a linearized NTC network or a temperature sensing IC
placed near the hot spot of the converter from this pin to
SGND, the temperature of each channel can be sensed.
The sensed voltage from each channel is converted to a
current, which is programmable with resistor, R_TCOMP,
at the TRSET pin. The current from each channel is then
summed together at the TAVG pin. The resistor value at
the TAVG is R_TCOMP/n, where n is the number of phases.
The voltage at TAVG is then a representation of the average
temperature of the whole system. By comparing the
phase temperature and average temperature, an internal
transconductance amplifier then adjusts the phase current
accordingly to match the phase temperature to the average
temperature of the system.
TCOMP1
THERMAL
SENSOR
OR NTC
30µA
+
–
CHANNEL 1
ADJUST
CHANNEL
CURRENT
g_m
AMP
MIRROR
1:1
TRSET1
R_TCOMP
TCOMP2
THERMAL
SENSOR
OR NTC
30µA
+
–
CHANNEL 2
ADJUST
CHANNEL
CURRENT
g_m
AMP
MIRROR
1:1
TRSET2
R_TCOMP
TAVG
R_AVG
REPEAT FOR
MULTICHIP
OPERATIONS
3875 F02
Figure 2. Thermal Balancing Technique for Multichip Operations
3875fa
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