English
Language : 

XPIO110GXS Datasheet, PDF (20/23 Pages) Lattice Semiconductor – Fully Integrated 10Gbps Serializer/Deserializer Device
Lattice Semiconductor
XPIO 110GXS Data Sheet
Output Pin Assignments and Descriptions
Pin Name
Pin Description
Flip-chip
Function BGA Ball #
TX_D_N
TX_D_P
10 Gbps CML transmit data. See Figure 5.
CML/
K3
Out
L3
TX_LOCK
TX PLL lock indicator:
TX LOCK = 1, internal TX_CLK locked to REF_CLK;
TX LOCK = 0, PLL is unlocked.
LVCMOS/
Out
D7
CK622OUT_N
CK622OUT_P
622 MHz LVDS clock output. Phase is adjustable1 and locks to LVDS/
R4
CMU or CDR clock.2
Out
R5
RX_CK_LV_P
RX_CK_LV_N
LVDS clock output. Clock is source synchronous to the LVDS
LVDS/
U9
receive, runs at 622MHz and is phase adjustable.
Out
T9
RX_D_LV_N[15], RX_D_LV_P[15],
RX_D_LV_N[14], RX_D_LV_P[14],
RX_D_LV_N[13], RX_D_LV_P[13],
RX_D_LV_N[12], RX_D_LV_P[12],
RX_D_LV_N[11], RX_D_LV_P[11],
RX_D_LV_N[10], RX_D_LV_P[10],
RX_D_LV_N[9], RX_D_LV_P[9],
RX_D_LV_N[8], RX_D_LV_P[8], LVDS data output. See Figure 8.
RX_D_LV_N[7], RX_D_LV_P[7],
RX_D_LV_N[6], RX_D_LV_P[6],
RX_D_LV_N[5], RX_D_LV_P[5],
RX_D_LV_N[4], RX_D_LV_P[4],
RX_D_LV_N[3], RX_D_LV_P[3],
RX_D_LV_N[2], RX_D_LV_P[2],
RX_D_LV_N[1],RX_D_LV_P[1],
RX_D_LV_N[0], RX_D_LV_P[0]
LVDS/
Out
T1, U1,
T2, U2
T3, U3
T4, U4
T5, U5
T6, U6
T7, U7
T8, U8
T10, U10
T11, U11
T12, U12
T13, U13
T14, U14
T15, U15
T16, U16
T17, U17
RX_LOCK
Receiver PLL lock indicator. The PLL locks to
REF_CK/RX_REF_CK.
RX_LOCK = 1, receiver PLL frequency is within 300 ppm;
LVCMOS/
RX_LOCK = 0, receiver PLL frequency is larger than 450 ppm; Out
M17
Frequency difference range is adjustable by
SC_LOCK_DIFF[1:0].
RX_D_RP_P3
RX_D_RP_N
10 Gbps CML output, repeat data. This output repeats the data
at the RX_D_P/N inputs when RX_D_RP_Enb = 0. This output
can be used for diagnostic purposes and to evaluate the receiv-
ers limiting amplifier. These pins can be left unconnected if
CML/
Out
H14
G14
unused.
TX_FIFO_ERR
FIFO error. 1 = error, 0 = normal operation.
LVCMOS/
Out
D6
1. CMU mode only.
2. Based on RX_REF_CK_Enb
3. Operation above 10.3Gbps is not supported.
20