IS61NVVP25672 Datasheet, PDF (2/29 Pages) Integrated Silicon Solution, Inc – 256K x 72 and 512K x 36, 18Mb PIPELINE (NO WAIT) STATE BUS SRAM

IS61NVVP25672
IS61NVVP51236
BLOCK DIAGRAM
ISSI ^®
A [0:17] or
A [0:18]
ADDRESS
REGISTER
A2-A17 or A2-A18
MODE
A0-A1
BURST
ADDRESS
COUNTER
A'0-A'1
CLK
CKE
CONTROL
LOGIC K
CE
CE2
CE2
} ^ADV
WE
BWŸX
(X=a,b,c,d or a,b)
CONTROL
REGISTER
OE
ZZ
DQa0-DQd7 or DQa0-DQb8
DQPa-DQPd
WRITE
ADDRESS
REGISTER
WRITE
ADDRESS
REGISTER
CONTROL
LOGIC
72 or 36
256Kx72; 512Kx36
MEMORY ARRAY
K DATA-IN
REGISTER
K DATA-IN
REGISTER
K _OUTPUT
REGISTER
BUFFER
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
ADVANCED INFORMATION Rev. 00A
07/17/02