IS61LPS51218A_12 Datasheet, PDF (12/35 Pages) Integrated Silicon Solution, Inc – 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM

IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A,
IS61VPS51218A, IS61VPS25636A
INTERLEAVED BURST ADDRESS TABLE (MODE = Vdd or No Connect)
External Address 1st Burst Address 2nd Burst Address 3rd Burst Address
A1 A0
A1 A0
A1 A0
A1 A0
00
01
10
11
01
00
11
10
10
11
00
01
11
10
01
00
LINEAR BURST ADDRESS TABLE (MODE = VSS)
0,0
A1', A0' = 1,1
0,1
   
1,0
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Symbol Parameter
Value
Unit
Tstg
Storage Temperature
–55 to +150
°C
Pd
Power Dissipation
1.6
W
Iout
Output Current (per I/O)
100
mA
Vin, Vout Voltage Relative to Vss for I/O Pins
–0.5 to Vddq + 0.5 V
Vin

Voltage Relative to Vss for
for Address and Control Inputs
–0.5 to Vdd + 0.5 V
Vdd
Voltage on Vdd Supply Relative to Vss
–0.5 to 4.6
V
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. This device contains circuity to protect the inputs against damage due to high static voltages
or electric fields; however, precautions may be taken to avoid application of any voltage
higher than maximum rated voltages to this high-impedance circuit.
3. This device contains circuitry that will ensure the output devices are in High-Z at power up.
12
Integrated Silicon Solution, Inc.
Rev. L
09/06/12