D2-7XX83_14 Datasheet, PDF (8/33 Pages) Intersil Corporation – Intelligent Digital Amplifier and Sound Processor

D2-7xx83
Serial Audio Interface Port Timing (Figure 1) T_A = +25°C, CVDD = PLLVDD = 1.8V ±5%, RVDD = PWMVDD = 3.3V ±10%.
All grounds at 0.0V. All voltages referenced to ground.
SYMBOL
DESCRIPTION
MIN
(Note 10)
MAX
TYP
(Note 10)
UNIT
tc_SCLK
tw_SCLK
ts_LRCLK
th_LRCLK
ts_SDI
th_SDI
t_dSDO
SCKRx Frequency - SCKR0, SCKR1
SCKRx Pulse Width (High and Low) - SCKR0, SCKR1
LRCKRx Setup to SCLK Rising - LRCKR0, LRCKR1
LRCKRx Hold from SCLK Rising - LRCKR0, LRCKR1
SDINx Setup to SCLK Rising - SDIN0, SDIN1
SDINx Hold from SCLK Rising - SDIN0, SDIN1
SDOUTx Delay from SCLK Falling
12.5
MHz
40
ns
20
ns
20
ns
20
ns
20
ns
20
ns
t_cSCLK
t_wSCLK
SCKRx
t_hLRCLK
t_wSCLK
LRCLKRx
t_sLRCLK
t_sSDI
SDINx
t_dSDO
t_hSDI
SDOUTx
FIGURE 1. SERIAL AUDIO INTERFACE PORT TIMING
8
FN7838.2
September 29, 2011