D2-7XX83_14 Datasheet, PDF (27/33 Pages) Intersil Corporation – Intelligent Digital Amplifier and Sound Processor

D2-7xx83
GRACEFUL OVERCURRENT AND SHORT CIRCUIT
Overcurrent sensing requires a current sensor in the power
device to be protected, usually a powered PWM output. The
typical sensor creates a pulse that is active when the current
exceeds a specified threshold.
The D2-7xx83 IC observes the overcurrent protection inputs and
provides graceful protection for the output stage. The hardware is
configured to provide immediate current reduction, cycle-by-cycle
output clipping, output signal control, and output stage
deactivation depending on the severity and duration of high
current events. The combination of hardware features and
firmware monitoring allows the system to differentiate between
an overcurrent situation or a more serious short circuit condition.
THERMAL PROTECTION
The D2-7xx83 IC can connect to an optional low-cost thermal
sensing circuit and monitor temperatures in the system.
Firmware monitoring can record the system temperature and
provide system responses including enabling a fan and
managing the audio output signal.
Device Operation
RESET AND INITIALIZATION
The D2-7xx83 must be reset after power up to begin proper
operation, and in normal system hardware configurations, the
reset occurs automatically via the reset hardware circuitry. The
chip contains power rail sensors, brown out detectors, on the 3.3V
and 1.8V power supplies. These brown out sensors will assert and
hold an internal Power-on Reset, which will disable the device until
the power supplies are at a safe level for the DSP to start. These
same brownout sensors will detect a power supply voltage droop
while the system is active and provide a safe amplifier shutdown.
POWER SEQUENCING
The CVDD and RVDD (including PWMVDD) supplies should be
brought up together to avoid high current transients that could
fold back a power supply regulator. The ADCVDD and PLLVDD
may be brought up separately. Best practice would be for all
supplies to feed from regulators with a common power source.
Typically this can be achieved by using a single 5V power source
and regulating the 3.3V and 1.8V supplies from that 5V source.
RESET
D2-7xx83 has one reset input: the nRESET pin. The nRESET input
pin (active low, non-reset high) is effectively a power-on system
reset. All internal state logic, except internal test hardware, is
initialized by nRESET. While reset is active the system is held in
the reset condition. The reset condition is defined as all internal
reset signals being active, the crystal oscillator is running, and
the PLL disabled.
At the de-assertion of nRESET, the chip will capture the boot
mode selection and begin the boot process.
Booting and Boot Modes
CODE INITIALIZATION AND BOOT MODES
D2-7xx83 includes a fully-programmable DSP with internal boot
ROM. The boot ROM’s primary function is to download a
second-stage boot image from one of several possible peripheral
sources:
• I²C Interface EEPROM
• I²C Interface Slave
• SPI ROM
• SPI Interface Slave
• HDA Bus
The specific boot mode is selected based on the state of the
IRQD, IRQC, IRQB, and IRQA pins at the time of reset
de-assertion. The boot ROM code has been designed to handle
both encrypted and non-encrypted boot images from any of the
above storage locations. Boot modes are shown in Table 4.
The system requires external firmware to boot the internal DSP.
Internal ROM within the DAE-6 initiates the boot process to read
the boot records and firmware, to load into the internal DAE-6
memory.
There are multiple boot modes provided on the DAE-6 devices, as
shown in Table 4. The mode is selected by a hardware pull-up or
pull-down connection to each of the four boot mode (IRQ[D:A])
pins. (Modes not listed are reserved.) Boot sources include:
• I²C EEPROM
• SPI EEPROM or SPI Flash
• I²C Slave (to external Microcontroller)
• SPI Slave (to external Microcontroller)
• Asynchronous UART (RS-232 for PC Communication Mode as
well as D2-7xx83 Device to Device Communication Mode)
• HD Audio Bus
• Combo Mode with I²C EEPROM or SPI
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FN7838.2
September 29, 2011