ISL6267 Datasheet, PDF (7/33 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion Mobile CPUs

Pin Configuration
ISL6267
ISL6267
(48 LD QFN)
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
FB2_NB 1
FB_NB 2
COMP_NB 3
VW_NB 4
PGOOD_NB 5
SVD 6
PWROK 7
SVC 8
ENABLE 9
PGOOD 10
VR_HOT 11
NTC 12
GND PAD
(BOTTOM)
36 PWM2_NB
35 BOOT2
34 UG2
33 PH2
32 LG2
31 VCCP
30 PWM3
29 LG1
28 PH1
27 UG1
26 BOOT1
25 PROG1
Pin Descriptions
PIN NUMBER
1
SYMBOL
FB2_NB
2
FB_NB
3
COMP_NB
4
VW_NB
5
PGOOD_NB
6
SVD
7
PWROK
8
SVC
9
ENABLE
10
PGOOD
11
VR_HOT
12
NTC
13
VW
14
COMP
15
FB
7
DESCRIPTION
The components connecting to FB2_NB are used to adjust the compensation in 1-phase mode to achieve
optimum performance.
Output voltage feedback to the inverting input of the Northbridge controller error amplifier.
Northbridge VR error amplifier output.
Window voltage set pin used to set the switching frequency for the Northbridge controller. A resistor from
this pin to COMP_NB programs the switching frequency (8kΩ gives approximately 300kHz).
Open-drain output to indicate the Northbridge portion of the IC is ready to supply regulated voltage. Pull-
up externally to VCCP or 3.3V.
Serial VID data bi-directional signal from the CPU processor master device to the VR.
System power good input. When this pin is high, the SVI interface is active and the I²C protocol is running.
While this pin is low, the SVC and SVD input states determine the pre-PWROK metal VID. This pin must
be low prior to the ISL6267 PGOOD output going high per the AMD SVI Controller Guidelines.
Serial VID clock input from the CPU processor master device.
Enable input. A high level logic on this pin enables both VRs.
Open-drain output to indicate the Core portion of the IC is ready to supply regulated voltage. Pull up
externally to VCCP or 3.3V.
Thermal overload open drain output indicator active LOW.
Thermistor input to VR_HOT circuit to monitor Core VR temperature.
Window voltage set pin used to set the switching frequency for the Core controller. A resistor from this
pin to COMP programs the switching frequency (8kΩ gives approximately 300kHz).
Error amplifier output.
Output voltage feedback to the inverting input of the Core controller error amplifier.
January 31, 2011
FN7801.0