ISL6267 Datasheet, PDF (28/33 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion Mobile CPUs

ISL6267
recommended to use a rather long R_isenC_isen time constant such
that the ISEN voltages have minimal ripple and represent the DC
current flowing through the inductors. Recommended values are
R_s = 10kΩ and C_s = 0.22µF.
NTC Thermal Monitors and VR_HOT Function
The ISL6267 features three pins (NTC, NTC_NB, and VR_HOT)
that allow the IC to monitor board temperature and alert the
AMD CPU of a thermal issue. Figure 30 shows the thermal
monitor feature of the ISL6267. An NTC network is connected
between the NTC and NTC_NB pins and GND. The controller
drives a 60µA current source out of the NTC pin and the NTC_NB
pin alternatively at 1kHz frequency with 50% duty cycle. The
pulsed current flows through the respective NTC resistor network
on the pins and creates a voltage that is compared to an
over-temperature trip threshold. If the voltage on both NTC pins is
higher than the over-temperature trip threshold, then VR_HOT is
pulled up by an external resistor on the pin.
level. The addition of hysteresis to the over-temperature
threshold prevents nuisance trips. Once both pin voltages exceed
the over-temperature reset threshold, the pull-down on VR_HOT
is released. The signal changes state and the CPU resumes
normal operation. The over-temperature threshold returns to the
trip level.
Selection of the NTC components can vary depending on how the
resistor network is configured. The equivalent resistance at the
typical over-temperature threshold voltage of 0.88V, to change
the state of VR_HOT, is defined in Equation 38.
-⁰---^.-⁸----⁸----^V--
60 μ A
=
14.7 k
(EQ. 38)
The equivalent resistance at the typical reset threshold voltage of
0.92V required to change the state of VR_HOT back low, is
defined in Equation 39.
-⁰---^.-⁹----²----^V--
60 μ A
=
15.3 k
(EQ. 39)
NTC
R_p
+
V_{NTC RNTC}
-
R_s
SW1
SW2
NTC_NB
R_p
+
V_{NTC RNTC}
-
R_s
60µA
VR_HOT
MONITOR
SW1 SW2
INTERNAL TO
ISL6267
+V
R
FIGURE 30. CIRCUITRY ASSOCIATED WITH THE THERMAL
MONITOR FEATURE OF THE ISL6267
As the board temperature rises, the NTC thermistor resistance
decreases and the voltage at the NTC pin drops. When the
voltage on the NTC pin drops below the over-temperature trip
threshold, then VR_HOT is pulled low. The VR_HOT signal is used
to change the CPU operation and decrease power consumption.
With the reduction in power consumption by the CPU, the board
temperature decreases and the NTC thermistor voltage rises.
Once the over-temperature threshold is tripped and VR_HOT is
taken low, the over-temperature threshold changes to the reset
The NTC thermistor value correlates this resistance change to the
required temperature hysteresis. A standard 1% resistor is
typically needed to meet the NTC pin threshold voltage.
For example, a Panasonic NTC thermistor with B = 4700 has a
resistance ratio of 0.03322 of its nominal value at +105°C and
0.03956 of its nominal value at +100°C. The required resistance
of the NTC is defined in Equation 40.
--⁽---¹---⁵----^.-³----^k----^Ω------–-----¹---⁴----^.-⁷----^k----^Ω-----⁾--
(0.03956 – 0.03322)
=
94.6 k Ω
(EQ. 40)
The closest, larger thermistor value for B = 4700 is 100kΩ. The
NTC thermistor part number is ERTJ1VV104.
At +105°C, a 100kΩ NTC resistance drops to
(0.03322 x 100kΩ) = 3.322kΩ. With a 60µA current flowing out
of the NTC pin, the voltage drop across the resistor is only
(3.322kΩ x 60µA) = 0.199V. This value is much lower than the
threshold voltage of 0.88V. A standard resistor, 1% tolerance,
added in series with the thermistor is required to raise the
voltage on the pin. The resistance required to meet the trip
threshold is calculated in Equation 41.
-⁰⁶---^.0-⁸---_μ-⁸---_A-^V-- – 3.322kΩ = 11.34kΩ
(EQ. 41)
The closest, standard 1% tolerance resistor is 11.3kΩ.
The NTC thermistor is placed in a hot spot on the board, typically
near the upper MOSFET of channel 1 of the respective output.
The standard resistor is placed next to the controller.
Layout Guidelines
Table 9 shows layout considerations for the ISL6267 controller. Refer to the reference designators shown in Figure 31.
TABLE 9. LAYOUT CONSIDERATIONS FOR THE ISL6267 CONTROLLER
ISL6267
SYMBOL
LAYOUT GUIDELINES
BOTTOM PAD
GND
Create analog ground plane underneath the controller and the analog signal processing components. Do not let
the power ground plane overlap with the analog ground plane. Avoid allowing noisy planes/traces (e.g., phase
node) to crossover/overlap the analog plane.
28
January 31, 2011
FN7801.0