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ISL6267 Datasheet, PDF (25/33 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion Mobile CPUs
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ISL6267
Cn
=
-----------------------------L------------------------------
-R----n---t--c---n---e---t---×-----R---------s---N--u-------m------- × DCR
Rntc
net
+
R-----s--u----m---
N
(EQ. 23)
For example, given N = 3, Rsum = 3.65kΩ, Rp = 11kΩ,
Rntcs = 2.61kΩ, Rntc = 10kΩ, DCR = 0.88mΩ and L = 0.36µH,
Equation 23 gives Cn = 0.406µF.
Assuming the compensator design is correct, Figure 21 shows the
expected load transient response waveforms if Cn is correctly
selected. When the load current Icore has a square change, the
output voltage Vcore also has a square response.
If Cn value is too large or too small, VCn(s) does not accurately
represent real-time Io(s) and worsens the transient response.
Figure 22 shows the load transient response when Cn is too
small. Vcore sags excessively upon load insertion and may create
a system failure. Figure 23 shows the transient response when
Cn is too large. Vcore is sluggish in drooping to its final value.
There is excessive overshoot if load insertion occurs during this
time, which may negatively affect the CPU reliability.
io
io
iL
Vo
RING
BACK
FIGURE 24. OUTPUT VOLTAGE RING-BACK PROBLEM
ISUM+
Rntcs
Rntc
Cn.1
Rp
Rn
OPTIONAL
Cn.2 Vcn
Ri ISUM-
Rip Cip
Vo
FIGURE 21. DESIRED LOAD TRANSIENT RESPONSE
WAVEFORMS
io
Vo
FIGURE 22. LOAD TRANSIENT RESPONSE WHEN Cn IS TOO
SMALL
io
Vo
FIGURE 23. LOAD TRANSIENT RESPONSE WHEN Cn IS TOO
LARGE
OPTIONAL
FIGURE 25. OPTIONAL CIRCUITS FOR RING-BACK REDUCTION
Figure 24 shows the output voltage ring-back problem during
load transient response. The load current io has a fast step
change, but the inductor current iL cannot accurately follow.
Instead, iL responds in first-order system fashion due to the
nature of the current loop. The ESR and ESL effect of the output
capacitors makes the output voltage Vo dip quickly upon load
current change. However, the controller regulates Vo according to
the droop current idroop, which is a real-time representation of iL;
therefore, it pulls Vo back to the level dictated by iL, causing the
ring-back problem. This phenomenon is not observed when the
output capacitor has very low ESR and ESL, as is the case with all
ceramic capacitors.
Figure 25 shows two optional circuits for reduction of the
ring-back. Cn is the capacitor used to match the inductor time
constant. It usually takes the parallel of two (or more) capacitors
to get the desired value. Figure 25 shows that two capacitors
(Cn.1 and Cn.2) are in parallel. Resistor Rn is an optional
component to reduce the Vo ring-back. At steady state, Cn.1 +
Cn.2 provides the desired Cn capacitance. At the beginning of io
change, the effective capacitance is less because Rn increases
the impedance of the Cn.1 branch. As Figure 22 shows, Vo tends
to dip when Cn is too small, and this effect reduces the Vo
ring-back. This effect is more pronounced when Cn.1 is much
larger than Cn.2. It is also more pronounced when Rn is bigger.
However, the presence of Rn increases the ripple of the Vn signal
if Cn.2 is too small. It is recommended to keep Cn.2 greater than
2200pF. Rn value usually is a few ohms. Cn.1, Cn.2 and Rn values
25
January 31, 2011
FN7801.0
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