ISL6267 Datasheet, PDF (29/33 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion Mobile CPUs

ISL6267
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ISL6267
TABLE 9. LAYOUT CONSIDERATIONS FOR THE ISL6267 CONTROLLER (Continued)
SYMBOL
LAYOUT GUIDELINES
FB2_NB
Place the compensator components (R25, R9, R24, C88, C51, C86, and C153) close to the controller.
FB_NB
COMP_NB
VW_NB
Place the capacitor (C85) across VW, and place COMP close to the controller.
PGOOD_NB
No special consideration.
SVD, PWROK, SVC Use good signal integrity practices.
ENABLE
No special consideration.
PGOOD
No special consideration.
VR_HOT
No special consideration.
NTC
Place the NTC thermistor (R46) close to the thermal source that is monitored to determine CPU V_CORE thermal
throttling. Usually it is placed close to Core VR phase-1 high-side MOSFET.
VW
Place the capacitor (C4) across VW and COMP close to the controller.
COMP
Place the compensator components (R7, R10, R11, C3, C6, C11 and C5) in general proximity to the controller.
FB
FB2
ISEN3
ISEN2
ISEN1
Each ISEN pin has a capacitor (C_isen) decoupling it to VSUMN and then through another capacitor (C_vsumn) to
GND. Place Cisen capacitors as close as possible to the controller and keep the following loops small:
1. Any ISEN pin to another ISEN pin
2. Any ISEN pin to GND
The red traces in the following drawing show the loops to be minimized.
ISEN3
Phase1
Risen
L3
Ro
Cisen
Phase2
L2
Vo
Risen
Ro
ISEN2
ISEN1
GND
Cisen
Phase3
Risen
Vsumn
Cisen _Cvsumn
L1
Ro
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VSEN
Place the VSEN/RTN filter (C12, C13) close to the controller for good decoupling.
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RTN
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January 31, 2011
FN7801.0