X28HC256_15 Datasheet, PDF (6/19 Pages) Intersil Corporation – 256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM

X28HC256
Read Cycle
t_RC
ADDRESS
t_CE
CE
t_OE
OE
V_IH
WE
DATA I/O
HIGH Z
t_OLZ
t_LZ
t_OH
DATA VALID
t_HZ
DATA VALID
t_OHZ
t_AA
FIGURE 3. READ CYCLE
Write Cycle Limits
PARAMETER
TYP
SYMBOL
MIN
(Note 10)
MAX
UNIT
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
CE Pulse Width
OE HIGH Setup Time
OE HIGH Hold Time
WE Pulse Width
WE HIGH Recovery (page write only)
t_WC (Note 11)
3
t_AS
0
t_AH
50
t_CS
0
t_CH
0
t_CW
50
t_OES
0
t_OEH
0
t_WP
50
t_WPH
50
(Note 12)
5
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Valid
t_DV
1
µs
Data Setup
t_DS
50
ns
Data Hold
t_DH
0
ns
Delay to Next Write After Polling is True
t_DW (Note 12)
10
µs
Byte Load Cycle
t_BLC
0.15
100
µs
NOTES:
10. Typical values are for T_A = +25°C and nominal supply voltage.
11. t_WC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device
requires to automatically complete the internal write operation.
12. t_WPH and t_DW are periodically sampled and not 100% tested.
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6
FN8108.5
August 27, 2015