X28HC256_15 Datasheet, PDF (5/19 Pages) Intersil Corporation – 256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM

X28HC256
AC Conditions of Test
Input pulse levels
Input rise and fall times
Input and output timing levels
0V to 3V
5ns
1.5V
Mode Selection
CE
OE
WE
MODE
L
L
H
Read
L
H
L
Write
H
X
X Standby and write
inhibit
X
L
X
Write inhibit
X
X
H
Write inhibit
I/O
D_OUT
D_IN
High Z
—
—
POWER
active
active
standby
—
—
Symbol Table
WAVEFORM
INPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
Equivalent AC Load Circuit
5V
OUTPUT
1.92k
1.37k
30pF
FIGURE 2. EQUIVALENT AC LOAD CIRCUIT
AC Electrical Specifications Across recommended operating conditions, unless otherwise specified.
X28HC256-70 X28HC256-90 X28HC256-12 X28HC256-15
PARAMETER
SYMBOL
MIN MAX MIN
MAX MIN MAX MIN
MAX UNIT
Read Cycle Time
t_RC
70
90
120
150
ns
Chip Enable Access Time
t_CE
70
90
120
150
ns
Address Access Time
t_AA
70
90
120
150
ns
Output Enable Access Time
t_OE
35
40
50
50
ns
CE LOW to Active Output
t_LZ (Note 9)
0
0
0
0
ns
OE LOW to Active Output
t_OLZ (Note 9)
0
0
0
0
ns
CE HIGH to High Z Output
t_HZ (Note 9)
35
40
50
50
ns
OE HIGH to High Z Output
t_OHZ (Note 9)
35
40
50
50
ns
Output Hold from Address Change
t_OH
0
0
0
0
ns
NOTE:
9. t_LZ minimum, t_HZ, t_OLZ minimum and t_OHZ are periodically sampled and not 100% tested, t_HZ and t_OHZ are measured with C_L = 5pF, from the point
when CE, OE return HIGH (whichever occurs first) to the time when the outputs are no longer driven..
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5
FN8108.5
August 27, 2015