ISL68137_16 Datasheet, PDF (5/53 Pages) Intersil Corporation – Digital Dual Output, 7-Phase Configurable PWM

ISL68137
Driver, DrMOS and Smart Power Stage Recommendation
INTERSIL PART QUIESCENT CURRENT
NUMBER
(mA)
ISL99227
4.85
ISL99140
0.19
ISL6596
0.19
ISL6617A
5
GATE DRIVE
VOLTAGE (V)
5
5
5
N/A
NUMBER OF
DRIVERS
COMMENTS
Single 60A, 5x5 smart power stage
Single 40A, 6x6 DrMOS
Single Connect ISL6596 VCTRL to 3.3V
N/A
Phase doubler with 5V PWM output to be compatible with a 60A DrMOS or
with 60A smart power stage. Supports up to a 14-phase design.
Internal Block Diagram
CS0
CSRTN0
CS1
C SR TN 1
CS2
CSRTN2
CS3
CSRTN3
CS4
C SR TN 4
CS5
C SR TN 6
CS6
C SR TN 6
ADC
ADC
ADC
ADC
ADC
ADC
ADC
VDROOP
VSE N0
RGND0
VSA
ADC
VDROOP
VSE N1
RGND1
VSA
ADC
VINSEN
TMO N0
TMO N1
VCC
VCCS
LDO
CURRENT
AC FB
PID
CURRENT
AC FB
PID
ADC
C YC LE -
CYCLE OCP
C YC LE -
CYCLE OCP
C YC LE -
CYCLE OCP
C YC LE -
CYCLE OCP
C YC LE -
CYCLE OCP
C YC LE -
CYCLE OCP
C YC LE -
CYCLE OCP
SUMMED
OCP
SUMMED
OCP
OV -
+
-
UV +
OV -
+
-
UV +
FAULT AND
TELEMETRY
MANAGER
STATUS
MANAGER
LOOP
MANAGER
CPU
NVM
BLACKBO X
DIG ITAL DUAL
EDGE
MODULATOR
DIG ITAL DUAL
EDGE
MODULATOR
PMBus
INTERFACE
AVSBus
INTERFACE
FIGURE 1. INTERNAL BLOCK DIAGRAM
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5
PG0
PG1
TWARN
EN0
EN1
CONFIG
SA
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
SCL
SDA
SALRT
AVS_CLK
AVS_MDA
AVS_SDA
AVS_VDDIO
FN8757.0
September 27, 2016