ISL68137_16 Datasheet, PDF (4/53 Pages) Intersil Corporation – Digital Dual Output, 7-Phase Configurable PWM

ISL68137
Functional Pin Descriptions Refer to Table 4 on page 21 for design layout considerations.
PIN NUMBER
7, 6, 5, 4, 3, 2, 1
8
9
10
11
12, 46, 47, 48
13
14
15
16
17
18
19
20
21
22
23
24
25, 27, 29, 31,
33, 35, 37
26, 28, 30, 32,
34, 36, 38
39
40
41
42
43
44
45
EPAD
PIN NAME
PWM[6:0]
AVS_CLK
AVS_SDA
AVS_MDA
AVS_VDDIO
DNC
EN0
EN1
TWARN
PG0
PG1
SCL
SDA
SALRT
CONFIG
VINSEN
VSEN1
RGND1
CSRTN[6:0]
CS[6:0]
RGND0
VSEN0
SA
VCC
VCCS
TMON0
TMON1
GND
DESCRIPTION
Pulse width modulation outputs. Connect these pins to the PWM input pins of 3.3V logic compatible Intersil
smart power stages, driver IC(s) or power stages.
AVSBus clock input pin. Connect to ground if not used.
AVSBus data output pin. Leave open if not used.
AVSBus data input pin. Connect to ground if not used.
AVSBus reference voltage input pin. Leave open if not used.
Do not connect any signals to these pins.
Input pin used for enable control of Output 0. Active high. Connect to ground if not used.
Input pin used for enable control of Output 1. Active high. Connect to ground if not used.
Thermal warning flag. This open-drain output will be pulled low in the event of a sensed over-temperature at
TMON pins without disabling the regulators. Maximum pull-up voltage is V_CC.
Open-drain power-good indicators for Output 0. Maximum pull-up voltage is V_CC.
Open-drain power-good indicators for Output 1. Maximum pull-up voltage is V_CC.
Serial clock signal pin for SMBus interface. Maximum pull-up voltage is V_CC.
Serial data signal pin for SMBus interface. Maximum pull-up voltage is V_CC.
Serial alert signal pin for SMBus interface. Maximum pull-up voltage is V_CC.
Configuration ID selection pin. See Table 3 for more details.
Input voltage sense pin. Connect to VIN through a resistor divider (typically 40.2k/10k) with a 10nF decoupling
capacitor.
Positive differential voltage sense input for Output 1. Connect to positive remote sensing point. Connect to
ground if not used.
Negative differential voltage sense input for Output 1. Connect to negative remote sensing point. Connect to
ground if not used.
The CS and CSRTN pins are current sense inputs to individual phase differential amplifiers. Unused phases
should have their respective current sense inputs grounded. The ISL68137 supports smart power stage, DCR and
resistor sensing. Connection details depend on current sense method chosen.
Negative differential voltage sense input for Output 0. Connect to negative remote sensing point. Connect to
ground if not used.
Positive differential voltage sense input for Output 0. Connect to positive remote sensing point. Connect to
ground if not used.
PMBus Address selection pin. See Table 2 on page 13 for more details.
Chip primary bias input. Connect this pin directly to a +3.3V supply with a high quality MLCC bypass capacitor.
Internally generated 1.2V LDO logic supply from VCC. Decouple with 4.7µF or greater MLCC (X5R or better).
Input pin for external temperature measurement at Output 0. Supports diode based temperature sensing as well
as smart power stage sensing. Refer to section “Temperature Compensation” on page 16 for more information.
Input pin for external temperature measurement at Output 1. Supports diode based temperature sensing as well
as smart power stage sensing. Refer to section “Temperature Compensation” on page 16 for more information.
Package pad serves as GND return for all chip functions. Connect directly to system GND plane with multiple
thermal vias.
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September 27, 2016