X9251_14 Datasheet, PDF (4/21 Pages) Intersil Corporation – Single Supply/Low Power/256-Tap/SPI Bus, Quad Digitally-Controlled Potentiometer

X9251
Functional Pin Descriptions
Bus Interface Pins
SERIAL OUTPUT (SO)
SO is a serial data output pin. During a read cycle, data is shifted
out on this pin. Data is clocked out by the falling edge of the
serial clock.
SERIAL INPUT (SI)
SI is the serial data input pin. All opcodes, byte addresses and
data to be written to the device registers are input on this pin.
Data is latched by the rising edge of the serial clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the X9251.
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select the device.
Once the part is selected and a serial sequence is underway,
HOLD may be used to pause the serial communication with the
controller without resetting the serial sequence. To pause, HOLD
must be brought LOW while SCK is LOW. To resume
communication, HOLD is brought HIGH, again while SCK is LOW.
If the pause feature is not used, HOLD should be held HIGH at all
times.
DEVICE ADDRESS (A1 AND A0)
The address inputs are used to set the two least significant bits of
the slave address. A match in the slave address serial data
stream must be made with the address input in order to initiate
communication with the X9251. Device pins A1 and A0 must be
tied to a logic level which specifies the internal address of the
device, see Figures 3, 4, 5, 6 and 7.
CHIP SELECT (CS)
When CS is HIGH, the X9251 is deselected and the SO pin is at
high impedance, and (unless an internal write cycle is underway)
the device is in the standby state. CS LOW enables the X9251,
placing it in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is required prior to
the start of any operation.
Potentiometer Pins
R_H, R_L
The R_H and R_L pins are equivalent to the terminal connections on
a mechanical potentiometer. Since there are 4 potentiometers,
there are 4 sets of R_H and R_L such that R_H0 and R_L0 are the
terminals of DCP0 and so on.
R_W
The wiper pins are equivalent to the wiper terminal of a
mechanical potentiometer. Since there are 4 potentiometers,
there are 4 sets of R_W such that R_W0 is the terminals of DCP0
and so on.
Supply Pins
SYSTEM SUPPLY VOLTAGE (V_CC) AND SUPPLY
GROUND (V_SS)
The V_CC pin is the system supply voltage. The V_SS pin is the
system ground.
Other Pins
NO CONNECT
No connect pins should be left floating. These pins are used for
Intersil manufacturing and testing purposes.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin, when LOW, prevents nonvolatile writes to the Data
Registers.
Principles of Operation
The X9251 is an integrated circuit incorporating four DCPs and
their associated registers and counters, and a serial interface
providing direct communication between a host and the
potentiometers.
DCP Description
Each DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each DCP are
equivalent to the fixed terminals of a mechanical potentiometer
(R_H and R_L pins). The RW pin is an intermediate node, equivalent
to the wiper terminal of a mechanical potentiometer.
The position of the wiper terminal within the DCP is controlled by
an 8-bit volatile Wiper Counter Register (WCR).
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FN8166.6
December 3, 2014