X9251_14 Datasheet, PDF (13/21 Pages) Intersil Corporation – Single Supply/Low Power/256-Tap/SPI Bus, Quad Digitally-Controlled Potentiometer

X9251
Endurance and Data Retention
PARAMETER
Minimum endurance
Data retention
MIN
100,000
100
UNITS
Data changes per bit per register
years
Capacitance
SYMBOL
TEST
C_IN/OUT (Note 14) Input/Output capacitance (SI)
C_OUT (Note 14) Output capacitance (SO)
C_IN (Note 14) Input capacitance (A0, A1, CS, WP, HOLD, and SCK)
TEST CONDITIONS
TYP
V_OUT = 0V
8
V_OUT = 0V
8
V_IN = 0V
6
UNITS
pF
pF
pF
Power-Up Timing
SYMBOL
t_r V_CC (Note 14)
t_PUR (Note 15)
t_PUW (Note 15)
PARAMETER
V_CC Power-up Rate
Power-up to Initiation of Read Operation
Power-up to Initiation of Write Operation
MIN
MAX
UNITS
0.2
V/ms
1
ms
50
ms
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
V_CC x 0.1 to V_CC x 0.9
10ns
Input and Output Timing Level
V_CC x 0.5
NOTES:
9. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer.
10. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. It is a
measure of the error in step size.
11. MI = RTOT/255 or (R_H - R_L)/255, single pot.
12. During power up V_CC > V_H, V_L, and V_W.
13. n = 0, 1, 2, …,255; m = 0, 1, 2, …, 254.
14. This parameter is not 100% tested
15. t_PUR and t_PUW are the delays required from the time the (last) power supply (V_CC-) is stable until the specific instruction can be issued. These
parameters are periodically sampled and not 100% tested.
Equivalent AC Load Circuit
SO PIN
V_CC
2kΩ
2kΩ
10pF
SPICE MACROMODEL
R_TOTAL
R_H
C_L
C_W
10pF
25pF
R_W
R_L
C_L
10pF
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FN8166.6
December 3, 2014