X9251_14 Datasheet, PDF (14/21 Pages) Intersil Corporation – Single Supply/Low Power/256-Tap/SPI Bus, Quad Digitally-Controlled Potentiometer

X9251
AC TIMING
SYMBOL
PARAMETER
f_SCK
t_CYC
t_WH
t_WL
t_LEAD
t_LAG
t_SU
t_H
t_RI
t_FI
t_DIS
t_V
t_HO
t_RO (Note 14)
t_FO (Note 14)
t_HOLD
t_HSU
t_HH
t_HZ
t_LZ
T_I
t_CS
t_WPASU
t_WPAH
SPI clock frequency
SPI Clock Cycle Time
SPI Clock High Time
SPI Clock Low Time
Lead Time
Lag Time
SI, SCK, HOLD and CS Input Setup Time
SI, SCK, HOLD and CS Input Hold Time
SI, SCK, HOLD and CS Input Rise Time
SI, SCK, HOLD and CS Input Fall Time
SO Output Disable Time
SO Output Valid Time
SO Output Hold Time
SO Output Rise Time
SO Output Fall Time
HOLD Time
HOLD Setup Time
HOLD Hold Time
HOLD Low to Output in High Z
HOLD High to Output in Low Z
Noise Suppression Time Constant at SI, SCK, HOLD and CS Inputs
CS Deselect Time
WP, A0 Setup Time
WP, A0 Hold Time
High-Voltage Write Cycle Timing
SYMBOL
t_WR
PARAMETER
High-voltage write cycle time (store instructions)
XDCP Timing
SYMBOL
t_WRPO (Note 14)
t_WRL (Note 14)
PARAMETER
Wiper response time after the third (last) power supply is stable
Wiper response time after instruction issued (all load instructions)
MIN
MAX
UNITS
2
MHz
500
ns
200
ns
200
ns
250
ns
250
ns
50
ns
50
ns
2
µs
2
µs
0
250
ns
200
ns
0
ns
100
ns
100
ns
400
ns
100
ns
100
ns
100
ns
100
ns
10
ns
2
µs
0
ns
0
ns
TYP
MAX
UNITS
5
10
ms
MIN
MAX
UNITS
5
10
µs
5
10
µs
Submit Document Feedback ₁₄
FN8166.6
December 3, 2014