ISL6333 Datasheet, PDF (4/40 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with Integrated MOSFET Drivers and Light Load Efficiency Enhancements for Intel VR11.1 Applications

Pinouts (Continued)
ISL6333, ISL6333A, ISL6333B, ISL6333C
ISL6333C (48 LD QFN)
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
RSET 1
OFS 2
FS 3
SS 4
VCC 5
REF 6
APA 7
COMP 8
DVC 9
FB 10
CPURST_N 11
VDIFF 12
GND (PIN 49)
36 VR_RDY
35 EN
34 PUVCC
33 PHASE2
32 UGATE2
31 BOOT2
30 LGATE2
29 PVCC3
28 LGATE3
27 BOOT3
26 UGATE3
25 PHASE3
13 14 15 16 17 18 19 20 21 22 23 24
Controller Descriptions and Comments
CONTROLLER
ISL6333
ISL6333A
ISL6333B
ISL6333C
CONTROLLER
ISL6333
ISL6333A
ISL6333B
ISL6333C
DIODE
GATE VOLTAGE OPTIMIZATION
EMULATION
TECHNOLOGY
MODE (DEM)
(GVOT)
DROOP PIN
ENABLE/DISABLE DROOP
CPURST_N PIN
YES
YES
YES
Enable/Disable
NO
NO
NO
YES
Enable/Disable
NO
YES
YES
NO
Always Enabled
YES
NO
NO
NO
Always Enabled
YES
COMMENTS
When PSI# is set high, the controller operates normally in continuous conduction mode (CCM) with all active channels firing.
When the PSI# pin is set low, the controller transitions to single phase operation and changes to diode emulation mode (DEM).
The controller also utilizes it’s new Gate Voltage Optimization Technology (GVOT) to reduce Channel 1’s lower MOSFET gate
drive voltage. This controller yields the highest low load efficiency.
When PSI# is set high, the controller operates normally in continuous conduction mode (CCM) with all active channels firing.
When the PSI# pin is set low, the controller transitions to single phase operation only.
Same feature set as the ISL6333 controller with two additional changes. The CPURST_N pin is added to eliminate extensive
external circuitry required for proper PSI# operation of Intel’s Eaglelake Chipset Platform. The droop pin has been removed
and the droop current now flows out of the FB pin. The droop feature is always active. This controller yields the highest low
load efficiency.
Same feature set as the ISL6333A controller with two additional changes. The CPURST_N pin is added to eliminate extensive
external circuitry required for proper PSI# operation of Intel’s Eaglelake Chipset Platform. The droop pin has been removed
and the droop current now flows out of the FB pin. The droop feature is always active.
4
FN6520.3
October 8, 2010