ISL6333 Datasheet, PDF (34/40 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with Integrated MOSFET Drivers and Light Load Efficiency Enhancements for Intel VR11.1 Applications

ISL6333, ISL6333A, ISL6333B, ISL6333C
.
ΔV₁
ΔV₂
V_OUT
I_TRAN
ΔI
FIGURE 23. TIME CONSTANT MISMATCH BEHAVIOR
Loadline Regulation Resistor
If load line regulation is desired on the ISL6333 and
ISL6333A, the IDROOP pin should be connected to the FB
pin in order for the internal average sense current to flow
out across the loadline regulation resistor, labeled R_FB in
Figure 7. The ISL6333B and ISL6333C always have the
load line regulation enabled. The R_FB resistor value sets
the desired loadline required for the application. The
desired loadline, R_LL, can be calculated by Equation 36
where V_DROOP is the desired droop voltage at the full load
current I_FL.
R_LL
=
V-----_{D----R----O-----O----P--}
I_FL
(EQ. 36)
Based on the desired loadline, the loadline regulation
resistor, R_FB, can be calculated from Equation 37.
R_FB
=
-^R----^L---^L-----^â‹---^N------^â‹---^R----^S----^E----^T--
DCR
⋅
----³-----
400
(EQ. 37)
In Equation 37, R_LL is the loadline resistance; N is the
number of active channels; DCR is the DCR of the individual
output inductors; and R_SET is the RSET pin resistor.
If no loadline regulation is required on the ISL6333 and
ISL6333A, the IDROOP pin should be left unconnected. To
choose the value for R_FB in this situation, please refer to
“Compensation Without Load-line Regulation” on page 35.
IMON Pin Resistor
A copy of the average sense current flows out of the IMON
pin, and a resistor, R_IMON, placed from this pin to ground can
be used to set the overcurrent protection trip level. Based on
the desired overcurrent trip threshold, I_OCP, the IMON pin
resistor, R_IMON, can be calculated from Equation 38.
R_IMON
=
-----^R----^S----^E----^T-----^â‹---^N------
DCR ⋅ I_OCP
⋅
3_----._-3_----8_---1_--
400
(EQ. 38)
APA Pin Component Selection
A 100µA current flows into the APA pin and across R_APA to
set the APA trip level. A 1000pF capacitor, C_APA, should
also be placed across the R_APA resistor to help with noise
immunity. Use Equation 39 to set R_APA to get the desired
APA trip level. An APA trip level of 500mV is recommended
for most applications.
R_APA
=
-^V----^A----^P----^A---⁽---^T---^R----^I--^P----⁾
100 × 10^–6
=
-----⁵---⁰----⁰----^m-----^V-------
100 × 10^–6
=
5kΩ
(EQ. 39)
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATION WITH LOAD-LINE REGULATION
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R_C and C_C. See Figure 24.
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
C₂ (OPTIONAL)
R_C ^CC
COMP
FB
ISL6333
IDROOP
R_FB
VDIFF
FIGURE 24. COMPENSATION CONFIGURATION FOR
LOAD-LINE REGULATED ISL6333 CIRCUIT
Select a target bandwidth for the compensated system, f₀.
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f₀
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
34
FN6520.3
October 8, 2010