ISL6277A Datasheet, PDF (35/38 Pages) Intersil Corporation – Multiphase PWM Regulator for AMD Fusion Mobile CPUs Using SVI 2.0

ISL6277A PIN
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ISL6277A
TABLE 14. LAYOUT CONSIDERATIONS FOR THE ISL6277A CONTROLLER (Continued)
SYMBOL
LAYOUT GUIDELINES
VR_HOT_L
Follow AMD recommendations. Placement of the pull-up resistor near the IC is recommended.
SVD
Use good signal integrity practices and follow AMD recommendations.
VDDIO
Use good signal integrity practices and follow AMD recommendations.
SVT
Use good signal integrity practices and follow AMD recommendations.
ENABLE
No special considerations.
PWROK
Use good signal integrity practices and follow AMD recommendations.
IMON
Place the IMON resistor close to this pin and keep a tight GND connection.
NTC
The NTC thermistor must be placed close to the thermal source that is monitored to determine Core thermal
throttling. Placement at the hottest spot of the Core VR is recommended. Additional standard resistors in the
resistor network on this pin should be placed near the IC.
ISEN3
ISEN2
ISEN1
Each ISEN pin has a capacitor (C_isen) decoupling it to VSUMN and then through another capacitor (C_vsumn) to
GND. Place Cisen capacitors as close as possible to the controller and keep the following loops small:
1. Any ISEN pin to another ISEN pin
2. Any ISEN pin to GND
The red traces in the following drawing show the loops to be minimized.
ISEN3
Phase1
Risen
L3
Ro
Cisen
Vo
Phase2
L2
Risen
Ro
ISEN2
ISEN1
GND
Cisen
Cisen
Phase3
Risen
Vvsumn
Cvsumn
L1
Ro
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ISUMP
Place the current sensing circuit in general proximity of the controller.
Place capacitor Cn very close to the controller.
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ISUMN
Place the NTC thermistor next to Core VR Channel 1 inductor so it senses the inductor temperature correctly.
Each phase of the power stage sends a pair of VSUMP and VSUMN signals to the controller. Run these two
signals traces in parallel fashion with decent width (>20mil).
IMPORTANT: Sense the inductor current by routing the sensing circuit to the inductor pads. If possible, route the
traces on a different layer from the inductor pad layer and use vias to connect the traces to the center of the
pads. If no via is allowed on the pad, consider routing the traces into the pads from the inside of the inductor.
The following drawings show the two preferred ways of routing current sensing traces.
INDUCTOR
INDUCTOR
VIAS
CURRENT-SENSING TRACES
CURRENT-SENSING TRACES
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VSEN
Place the filter on these pins in close proximity to the controller for good coupling.
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RTN
35
FN8322.0
December 19, 2012