D2-926XX Datasheet, PDF (31/37 Pages) Intersil Corporation – Integrated DSP Digital Sound Processing

D2-926xx
with its audio function. Some blocks use one register only, while
other blocks with multiple control settings may use multiple
registers for each control. The parameter equations for all of the
audio blocks are provided in the Audio Canvas III User’s Manual.
Dynamic Register Addressing Architecture
Audio Canvas III supports building of any signal flow with no
restriction of the order of occurrence of any audio block, or any
limit to repeated deleting or addition during signal flow editing.
As audio algorithm blocks are edited, added, or removed, the
user-space memory addresses for each register will change.
However, each instance of each block has its own unique label
identifier where that identifier is clearly known and visible on the
signal flow workspace.
Because each and every algorithm is assigned its own dedicated
register for its parameter settings, the Audio Canvas III generates
a variable-to-address mapping for each build of each project. This
mapping is provided as a text file in a header file format that can
be directly included within a system controller’s software build.
As multiple iterations of a signal flow are created during the
design process, a new header file is created matching each
revision. Simply including the header file within the system
controller compile automatically passes these new register
addresses without need for repeated system code editing.
Hardware Feature Functions
In addition to the core firmware that runs the DAE devices to
operate the amplifier, several feature-specific options are
supported for use in the amplifier system. These optional
features are configurable and may be chosen or bypassed.
Configuration is set using the Audio Canvas III software, where
based on chosen settings, the firmware will include each function
along with the hardware I/O assigned to its function.
The DAE-3 supports pins assignable to various hardware
features, while the DAE-3HT shares choices between functions
with some of its available pins providing feature choices in a
lower pin-count package.
These hardware feature algorithms include:
AM AVOIDANCE MODE
AM Avoidance Mode allows selecting the PWM switching
frequency to move its harmonics away from the frequency of an
AM radio station, reducing possible station interference. The
algorithm is optional and selection is controlled through a
register setting that is created with the system firmware.
MCLK CLOCK OUTPUT
The MCLK output provides the I²S clock to external digital audio
circuits or devices. The MCLK output is optional, and when
enables is selectable between 2 frequencies.
PSSYNC CLOCK OUTPUT
The PSSYNC signal is used for synchronizing switching power
converters used in the amplifier. Providing a synchronizing
frequency that is a multiple or sub-multiple of the PWM switching
rate eliminates possibility of in-band audio frequency generation
from close but asynchronous clocks. The output is optional, and
when enabled supports 6 frequency multiple choices.
AUDIO I/O CONFIGURATION
This configuration allow choice selection of which audio
processing channels are assigned to the S/PDIF and I²S digital
outputs. It also supports choice of input port assignments to the
audio input channels.
FAULT INDICATION
An optional output may be assigned to provide a control signal to
a system controller or other hardware within the amplifier upon
detection of protection or fault conditions. The feature may be
enabled or disabled, and when enabled, allows choosing an
available I/O pin for providing this output.
DECODER SELECTION
Third party decoding of compressed formats is supported based
on the particular device part number. By default, when a device is
used that supports the licensed technology, its supported
decoding is enabled. Choices allow building of firmware to
selectively include or exclude the available decoding algorithms.
FORMAT CHANGE NOTIFICATION
The Format Change Notification feature allow assigning an I/O
pin to provide hardware indication when a change of decoded
format types is detected. This supports dynamic audio path
allocation by the system controller when audio content changes
to or from PCM and an encoded format. The feature is disabled
by default, but when enabled, allows assignment of the I/O pin to
signal this state. An additional setting allows choosing an audio
muting time delay between format changes.
IDLE POWER MANAGEMENT
The Idle Power Management feature allows controlled audio
PWM output shutdown after a time period has elapsed with no
audio detected above a threshold level. The feature is disabled by
default and when enabled allows choice of threshold time and
signal level, and assignment of an I/O pin that can be used to
signal other operations in the amplifier.
MASTER VOLUME ENCODER
The Master Volume Encoder feature allows assigning of I/O pins
to a quadrature-type encoder that can be used as a mechanical
volume control. The feature is disabled by default, but when
enabled allows choice of volume control algorithm association in
the audio signal flow, and choice of the I/O pins.
PWM OUTPUT CONFIGURATION
The PWM Output Configuration functions support assignment of
PWM output pins to each of the 12 PWM engines. It allows pin
polarity selection, and choice of enabling or disabling each PWM
engine.
PWM OUTPUT TIMING
The PWM Output Timing controls enable per-channel adjustment
of each PWM output timing. Controls included dead time,
minimum pulse width, and stagger settings between channels.
POWER DOWN OUTPUT
The Power Down Output feature supports setting an output pin
that can connect to power stages, for manually shutting down
power stages during fault detection and system startup. When
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May 17, 2016