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ISL6323 Datasheet, PDF (29/34 Pages) Intersil Corporation – Hybrid SVI/PVI
ISL6323
Case 1:
---------------1----------------
2⋅π⋅ L⋅C
>
f0
RC
=
RFB
⋅
2-----⋅---π-----⋅---f--0-----⋅--V-----p---p----⋅--------L-----⋅---C--
0.66 ⋅ VIN
CC
=
--------------0---.--6---6-----⋅---V----I--N----------------
2 ⋅ π ⋅ VPP ⋅ RFB ⋅ f0
Case 2:
---------------1----------------
2⋅π⋅ L⋅C
≤
f0
<
------------------1-------------------
2 ⋅ π ⋅ C ⋅ ESR
RC = RFB ⋅ -V----P----P-----⋅---(--20----.-⋅6---π-6---)--⋅2----V⋅----I-f-N0--2-----⋅---L-----⋅---C---
CC
=
------------------------------0----.-6----6-----⋅---V----I--N--------------------------------
(2 ⋅ π)2 ⋅ f02 ⋅ VPP ⋅ RFB ⋅ L ⋅ C
(EQ. 50)
Case 3:
f0 > 2-----⋅---π-----⋅---C--1----⋅---E----S-----R---
RC = RFB ⋅ 0-2---.--6⋅---6π-----⋅⋅---f-V-0---I--⋅N---V--⋅--p-E--p---S--⋅--R-L--
CC
=
-----0---.--6---6-----⋅---V----I--N-----⋅---E-----S----R------⋅-------C-------
2 ⋅ π ⋅ VPP ⋅ RFB ⋅ f0 ⋅ L
Compensation Without Loadline Regulation
The non load-line regulated converter is accurately modeled
as a voltage-mode regulator with two poles at the LC
resonant frequency and a zero at the ESR frequency. A
type-III controller, as shown in Figure 23, provides the
necessary compensation.
C2
RC CC
COMP
C1
R1
RFB
FB
ISL6323
VSEN
FIGURE 23. COMPENSATION CIRCUIT WITHOUT LOAD-LINE
REGULATION
The first step is to choose the desired bandwidth, f0, of the
compensated system. Choose a frequency high enough to
assure adequate transient performance but not higher than 1/3
of the switching frequency. The type-III compensator has an
extra high-frequency pole, fHF. This pole can be used for added
noise rejection or to assure adequate attenuation at the error
amplifier high-order pole and zero frequencies. A good general
rule is to choose fHF = 10f0, but it can be higher if desired.
Choosing fHF to be lower than 10f0 can cause problems with
too much phase shift below the system bandwidth as shown in
Equation 51.
R1
=
RFB
⋅ ------------C------⋅---E----S-----R-------------
L ⋅ C – C ⋅ ESR
C1
=
-----L-----⋅---C-----–-----C------⋅---E----S-----R--
RFB
C2
=
----------------------------------------0---.--7---5-----⋅---V-----I-N------------------------------------------
(2 ⋅ π)2 ⋅ f0 ⋅ fHF ⋅ ( L ⋅ C) ⋅ RFB ⋅ VP – P
(EQ. 51)
RC
=
-V----P----P-----⋅---⎝⎛---2----π---⎠⎞---2-----⋅---f--0----⋅---f--H----F-----⋅---L-----⋅---C-----⋅---R-----F----B--
0.75 ⋅ VIN ⋅ (2 ⋅ π ⋅ fHF ⋅ L ⋅ C–1)
CC
=
---------0---.--7---5-----⋅---V----I--N------⋅---(--2-----⋅---π-----⋅---f--H----F----⋅--------L-----⋅---C----–----1---)---------
(2 ⋅ π)2 ⋅ f0 ⋅ fHF ⋅ ( L ⋅ C) ⋅ RFB ⋅ VP – P
In the solutions to the compensation equations, there is a
single degree of freedom. For the solutions presented in
Equation 52, RFB is selected arbitrarily. The remaining
compensation components are then selected according to
Equation 52.
In Equation 52, L is the per-channel filter inductance divided
by the number of active channels; C is the sum total of all
output capacitors; ESR is the equivalent-series resistance of
the bulk output-filter capacitance; and VP-P is the peak-to-
peak sawtooth signal amplitude as described in “Electrical
Specifications” on page 6.
Output Filter Design
Case 1:
---------------1----------------
2⋅π⋅ L⋅C
>
f0
RC = RFB ⋅ 2-----⋅---π-----⋅---0f--0-.--6-⋅--6-V----⋅-p--V-p---I-⋅-N-------L----⋅---C---
CC
=
--------------0---.--6---6-----⋅---V----I--N----------------
2 ⋅ π ⋅ VPP ⋅ RFB ⋅ f0
Case 2:
---------------1----------------
2⋅π⋅ L⋅C
≤
f0
<
2-----⋅---π-----⋅---C--1----⋅---E----S-----R---
RC
=
RF
B
⋅
-V----P----P-----⋅---(--2-----⋅---π----)--2----⋅-----f-0--2-----⋅---L-----⋅---C---
0.66 ⋅ VIN
CC
=
------------------------------0----.-6----6-----⋅---V----I--N--------------------------------
(2 ⋅ π)2 ⋅ f02 ⋅ VPP ⋅ RFB ⋅ L ⋅ C
(EQ. 52)
Case 3:
f0
>
------------------1-------------------
2 ⋅ π ⋅ C ⋅ ESR
RC
=
RFB
⋅
-2-----⋅---π-----⋅---f--0-----⋅---V----p---p-----⋅---L--
0.66 ⋅ VIN ⋅ ESR
CC
=
----0----.--6---6-----⋅---V----I--N-----⋅---E----S-----R------⋅-------C-------
2 ⋅ π ⋅ VPP ⋅ RFB ⋅ f0 ⋅ L
29
FN9278.2
April 7, 2008