ISL6323 Datasheet, PDF (13/34 Pages) Intersil Corporation – Hybrid SVI/PVI

ISL6323
ground. The PWM signals command the MOSFET driver to
turn on/off the channel MOSFETs.
For 4-channel operation, the channel firing order is 4-3-2-1:
PWM3 pulse happens 1/4 of a cycle after PWM4, PWM2
output follows another 1/4 of a cycle after PWM3, and
PWM1 delays another 1/4 of a cycle after PWM2. For
3-channel operation, the channel firing order is 3-2-1.
Connecting ISEN4- to VCC selects three channel operation
and the pulse times are spaced in 1/3 cycle increments. If
ISEN3- is connected to VCC, two channel operation is selected
and the PWM2 pulse happens 1/2 of a cycle after PWM1 pulse.
Continuous Current Sampling
In order to realize proper current-balance, the currents in
each channel are sampled continuously every switching
cycle. During this time, the current-sense amplifier uses the
ISEN inputs to reproduce a signal proportional to the
inductor current, I_L. This sensed current, I_SEN, is simply a
scaled version of the inductor current.
PWM
SWITCHING PERIOD
I_L
I_SEN
TIME
FIGURE 4. CONTINUOUS CURRENT SAMPLING
The ISL6323 supports Inductor DCR current sensing to
continuously sample each channel’s current for channel-current
balance. The internal circuitry, shown in Figure 6 represents
Channel N of an N-Channel converter. This circuitry is repeated
for each channel in the converter, but may not be active
depending on how many channels are operating.
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 6. The channel current
I_Ln, flowing through the inductor, passes through the DCR.
Equation 5 shows the S-domain equivalent voltage, V_L,
across the inductor.
V_L(s) = I_Ln ⋅ (s ⋅ L + DCR)
(EQ. 5)
A simple RC network across the inductor (R₁, R₂ and C)
extracts the DCR voltage, as shown in Figure 6. The voltage
across the sense capacitor, V_C, can be shown to be
proportional to the channel current I_Ln, shown in Equation 6.
⎛
⎝
--^s-----^â‹---^L---
DCR
+
1_⎠⎞
V_C(s)
=
-------------------------------------------------------
⎛
⎜s
⎝
⋅
(_---R_-----1----⋅_---R_-----2---)
R₁ + R₂
⋅
C
+
⎞
1⎟
⎠
⋅
K
⋅
DCR
⋅
I_Ln
(EQ. 6)
Where:
K
=
-------^R-----²--------
R₂ + R₁
(EQ. 7)
MOSFET
DRIVER
V_IN
UGATE(n)
LGATE(n)
IL_n
L
DCR
INDUCTOR
V_L(s)
V_C(s)
R₁
C
V_OUT
C_OUT
ISL6323 INTERNAL CIRCUIT
R₂
I_n
SAMPLE
+
-
I_SEN
V_C(s)
R_ISEN
ISENn-
ISENn+
VCC
RSET
R_SET
C_SET
FIGURE 5. INDUCTOR DCR CURRENT SENSING
CONFIGURATION
If the RC network components are selected such that the RC
time constant matches the inductor L/DCR time constant
(see Equation 8), then V_C is equal to the voltage drop across
the DCR multiplied by the ratio of the resistor divider, K. If a
resistor divider is not being used, the value for K is 1.
------^L-------
DCR
=
-^R-----¹----^â‹---^R-----²--
R₁ + R₂
⋅
C
(EQ. 8)
The capacitor voltage V_C, is then replicated across the
effective internal sense resistor, R_ISEN. This develops a
current through R_ISEN which is proportional to the inductor
current. This current, I_SEN, is continuously sensed and is
then used by the controller for load-line regulation, channel-
current balancing, and overcurrent detection and limiting.
Equation 9 shows that the proportion between the channel
current, I_L, and the sensed current, I_SEN, is driven by the
value of the effective sense resistance, R_ISEN, and the DCR
of the inductor.
13
FN9278.2
April 7, 2008