ISL6323 Datasheet, PDF (23/34 Pages) Intersil Corporation – Hybrid SVI/PVI

ISL6323
on page 13 and “Channel-Current Balance” on page 14 for
more detail on how the average current is measured. Once
the average current exceeds 100µA, a comparator triggers
the converter to begin overcurrent protection procedures.
The Core regulator and the North Bridge regulator have the
same type of overcurrent protection.
The overcurrent trip threshold is dictated by the DCR of the
inductors, the number of active channels, the K_I gain (which
is determined by the R_SET resistor) the DC gain of the
inductor RC filter and the internal R_ISEN resistor. The
overcurrent trip threshold is shown in Equation 20.
I_OCP
=
100 μ A
⋅
-----^N--------
DCR
⋅
-¹--
K
⋅
⎝⎛ ₄^----₀₃^---₀^--
⋅
R_S
E
⎞
T⎠
(EQ. 20)
Where:
K = -------^R-----²--------
R₁ + R₂
See “Continuous Current Sampling” on
page 13.
Equation 20 is valid for both the Core regulator and the
North Bridge regulator. For the North Bridge regulator, N is 1.
During soft-start, the overcurrent trip point is boosted by a
factor of 1.4. Instead of comparing the average measured
current to 100µA, the average current is compared to 140µA.
Immediately after soft-start is over, the comparison level
changes to 100µA. This is done to allow for start-up into an
active load while still supplying output capacitor in-rush
current.
CORE REGULATOR OVERCURRENT
At the beginning of overcurrent shutdown, the controller sets
all of the UGATE and LGATE signals low, puts PWM3 and
PWM4 (if active) in a high-impedance state, and forces
VDDPWRGD low. This turns off all of the upper and lower
MOSFETs. The system remains in this state for fixed period of
12ms. If the controller is still enabled at the end of this wait
period, it will attempt a soft-start, as shown in Figure 16. If the
fault remains, the trip-retry cycles will continue until either the
fault is cleared or for a total of seven attempts. If the fault is
not cleared on the final attempt, the controller disables
UGATE and LGATE signals for both Core and North Bridge
and latches off requiring a POR of VCC to reset the ISL6323.
It is important to note that during soft start, the overcurrent
trip point is increased by a factor of 1.4. If the fault draws
enough current to trip overcurrent during normal run mode, it
may not draw enough current during the soft-start ramp
period to trip overcurrent while the output is ramping up. If a
fault of this type is affecting the output, then the regulator will
complete soft-start and the trip-retry counter will be reset to
zero. Once the regulator has completed soft-start, the
overcurrent trip point will return to it’s nominal setting and an
overcurrent shutdown will be initiated. This will result in a
continuous hiccup mode.
Note that the energy delivered during trip-retry cycling is
much less than during full-load operation, so there is no
thermal hazard.
OUTPUT CURRENT, 50A/DIV
0A
OUTPUT VOLTAGE,
500mV/DIV
0V
3ms/DIV
FIGURE 16. OVERCURRENT BEHAVIOR IN HICCUP MODE
NORTH BRIDGE REGULATOR OVERCURRENT
The overcurrent shutdown sequence for the North Bridge
regulator is identical to the Core regulator with the exception
that it is a single phase regulator and will only disable the
MOSFET drivers for the North Bridge. Once 7 retry attempts
have been executed unsuccessfully, the controller will disable
UGATE and LGATE signals for both Core and North Bridge
and will latch off requiring a POR of VCC to reset the ISL6323.
Note that the energy delivered during trip-retry cycling is
much less than during full-load operation, so there is no
thermal hazard.
Individual Channel Overcurrent Limiting
The ISL6323 has the ability to limit the current in each
individual channel of the Core regulator without shutting
down the entire regulator. This is accomplished by
continuously comparing the sensed currents of each channel
with a constant 140µA OCL reference current. If a channel’s
individual sensed current exceeds this OCL limit, the UGATE
signal of that channel is immediately forced low, and the
LGATE signal is forced high. This turns off the upper
MOSFET(s), turns on the lower MOSFET(s), and stops the
rise of current in that channel, forcing the current in the
channel to decrease. That channel’s UGATE signal will not
be able to return high until the sensed channel current falls
back below the 140µA reference.
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multiphase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced in the
following. In addition to this guide, Intersil provides complete
reference designs that include schematics, bills of materials,
and example board layouts for all common microprocessor
applications.
23
FN9278.2
April 7, 2008