X98021 Datasheet, PDF (28/29 Pages) Intersil Corporation – 210MHz Triple Video Digitizer with Digital PLL

X98021
START Command
Signals the beginning of serial I/O
X98021 Serial Bus Address
R/W _{X98021 Serial Bus Address Write}
This is the 7 bit address of the X98021 on the 2 wire bus. The
1
0
0
1
1
0
A
0 ^{address is 0x4C if pin 48 is low, 0x4D if pin 48 is high. R/W = 0,}
(pin 48)
indicating next transaction will be a write.
X98021 Register Address Write
A7
A6
A5
A4
A3
A2
A1
A0 _{This sets the initial address of the X98021’s configuration}
register for subsequent reading
START Command
Ends the previous transaction and starts a new one
X98021 Serial Bus Address
R/W _{X98021 Serial Bus Address Write}
This is the 7 bit address of the X98021 on the 2 wire bus. The
1
0
0
1
1
0
A
1 ^{address is 0x4C if pin 48 is low, 0x4D if pin 48 is high. R/W = 1,}
(pin 48)
indicating next transaction(s) will be a read.
D7
D6
Signals from
the Host
SDA Bus
Signals from
the X98021
X98021 Register Data Read(s)
D5
D4
D3
D2
D1
D0
This is the data read from the X98021’s configuration register.
(Repeat if desired)
Note: The X98021’s Configuration Register’s address pointer auto
increments after each data read: repeat this step to read multiple
sequential bytes of data from the Configuration Register.
STOP Command
Signals the ending of serial I/O
S
T _{Serial Bus}
A
R
Address
T
Register
Address
R
E
S
T Serial Bus
A _Address
R
T
Data
Read*
S
T
O
AP
C
100110A0 aaaaaaaa 100110A1
K
A
A
C
C
A
C
d
d
d
d
d
d
d
d
K
K
K
* The data read step may be repeated to read
from the X98021’s Configuration Register
sequentially, beginning at the Register
Address written in the two steps previous.
FIGURE 16. CONFIGURATION REGISTER READ
28
FN8219.0
June 2, 2005