X98021 Datasheet, PDF (11/29 Pages) Intersil Corporation – 210MHz Triple Video Digitizer with Digital PLL

X98021
Register Listing
ADDRESS REGISTER (DEFAULT VALUE)
0x01
SYNC Status
(read only)
BIT(s) FUNCTION NAME
0
HSYNC1 Active
1
HSYNC2 Active
2
VSYNC1 Active
DESCRIPTION
0: HSYNC1 is Inactive
1: HSYNC1 is Active
0: HSYNC2 is Inactive
1: HSYNC2 is Active
0: VSYNC1 is Inactive
1: VSYNC1 is Active
0x02
SYNC Polarity
(read only)
3
VSYNC2 Active
0: VSYNC2 is Inactive
1: VSYNC2 is Active
4
SOG1 Active
0: SOG1 is Inactive
1: SOG1 is Active
5
SOG2 Active
0: SOG2 is Inactive
1: SOG2 is Active
6
PLL Locked
0: PLL is unlocked
1: PLL is locked to incoming HSYNC
7
CSYNC Detected at 0: Composite Sync signal not detected
Sync Splitter Output 1: Composite Sync signal is detected
0
HSYNC1
Polarity
0: HSYNC1 is Active High
1: HSYNC1 is Active Low
1
HSYNC2
Polarity
2
VSYNC1
Polarity
3
VSYNC2
Polarity
4
HSYNC1
Trilevel
5
HSYNC2
Trilevel
7:6
N/A
0: HSYNC2 is Active High
1: HSYNC2 is Active Low
0: VSYNC1 is Active High
1: VSYNC1 is Active Low
0: VSYNC2 is Active High
1: VSYNC2 is Active Low
0: HSYNC1 is Standard Sync
1: HSYNC1 is Trilevel Sync
0: HSYNC2 is Standard Sync
1: HSYNC2 is Trilevel Sync
Returns 0
0x03
HSYNC Slicer (0x44)
0x04
SOG Slicer (0x08)
2:0
HSYNC1 Threshold 000 = lowest (0.4V) All values referred to
100 = default (2.0V) voltage at HSYNC input
111 = highest (3.2V) pin, 240mV hysteresis
3
Reserved
Set to 00
6:4
HSYNC2 Threshold See HSYNC1
7
Disable Glitch Filter 0: HSYNC/VSYNC Digital Glitch Filter Enabled (default)
1: HSYNC/VSYNC Digital Glitch Filter Disabled
3:0
SOG1 and SOG2
0x0 = lowest (0mV) 40mV hysteresis at
Threshold
0x8 = default (160mV) all settings
0xF = highest (300mV) 20mV step size
4
SOG Filter
Enable
0: SOG low pass filter disabled (default)
1: SOG low pass filter enabled, 14MHz corner
5
SOG Hysteresis
Disable
7:6
Reserved
0: 40mV SOG hysteresis enabled
1: 40mV SOG hysteresis disabled (default)
Set to 00.
11
FN8219.0
June 2, 2005