ISL6398 Datasheet, PDF (23/57 Pages) Intersil Corporation – Programmable soft-start rate and DVID rate

ISL6398
TABLE 4. 5mV OR 10mV VID 8-BIT (Continued)
HEX
BINARY CODE CODE
11000010 C2
11000011 C3
11000100 C4
11000101 C5
11000110 C6
11000111 C7
11001000 C8
11001001 C9
11001010 CA
11001011 CB
11001100 CC
11001101 CD
11001110 CE
11001111 CF
11010000 D0
11010001 D1
11010010 D2
11010011 D3
11010100 D4
5mV
VID (V)
1.215
1.220
1.225
1.230
1.235
1.240
1.245
1.250
1.255
1.260
1.265
1.270
1.275
1.280
1.285
1.290
1.295
1.300
1.305
11010101 D5 1.310
11010110 D6 1.315
11010111 D7 1.320
11011000 D8 1.325
11011001 D9 1.330
11011010 DA 1.335
11011011 DB 1.340
11011100 DC 1.345
11011101 DD 1.350
11011110 DE 1.355
11011111 DF 1.360
11100000 E0 1.365
11100001 E1 1.370
11100010 E2 1.375
11100011 E3 1.380
11100100 E4 1.385
11100101 E5 1.390
11100110 E6 1.395
11100111 E7 1.400
11101000 E8 1.405
11101001 E9 1.410
11101010 EA 1.415
11101011 EB 1.420
11101100 EC 1.425
11101101 ED 1.430
10mV
5mV
10mV
VID (V) OFFSET (mV) OFFSET (mV)
2.430
-310
-620
2.440
-305
-610
2.450
-300
-600
2.460
-295
-590
2.470
-290
-580
2.480
-285
-570
2.490
-280
-560
2.500
-275
-550
2.510
-270
-540
2.520
-265
-530
2.530
-260
-520
2.540
-255
-510
2.550
-250
-500
2.560
-245
-490
2.570
-240
-480
2.580
-235
-470
2.590
-230
-460
2.600
-225
-450
2.610
-220
-440
2.620
-215
-430
2.630
-210
-420
2.640
-205
-410
2.650
-200
-400
2.660
-195
-390
2.670
-190
-380
2.680
-185
-370
2.690
-180
-360
2.700
-175
-350
2.710
-170
-340
2.720
-165
-330
2.730
-160
-320
2.740
-155
-310
2.750
-150
-300
2.760
-145
-290
2.770
-140
-280
2.780
-135
-270
2.790
-130
-260
2.800
-125
-250
2.810
-120
-240
2.820
-115
-230
2.830
-110
-220
2.840
-105
-210
2.850
-100
-200
2.860
-95
-190
TABLE 4. 5mV OR 10mV VID 8-BIT (Continued)
HEX
BINARY CODE CODE
11101110 EE
11101111 EF
11110000 F0
11110001 F1
11110010 F2
11110011 F3
11110100 F4
11110101 F5
11110110 F6
11110111 F7
11111000 F8
11111001 F9
11111010 FA
11111011 FB
11111100 FC
11111101 FD
11111110 FE
11111111 FF
5mV
VID (V)
1.435
1.440
1.445
1.450
1.455
1.460
1.465
1.470
1.475
1.480
1.485
1.490
1.495
1.500
1.505
1.510
1.515
1.520
10mV
5mV
10mV
VID (V) OFFSET (mV) OFFSET (mV)
2.870
-90
-180
2.880
-85
-170
2.890
-80
-160
2.900
-75
-150
2.910
-70
-140
2.920
-65
-130
2.930
-60
-120
2.940
-55
-110
2.950
-50
-100
2.960
-45
-90
2.970
-40
-80
2.980
-35
-70
2.990
-30
-60
3.000
-25
-50
3.010
-20
-40
3.020
-15
-30
3.030
-10
-20
3.040
-5
-10
Load-line Regulation
Some applications require a precisely controlled output
resistance. This dependence of output voltage on load current is
often termed “droop” or “load-line” regulation. By adding a well
controlled output impedance, the output voltage can effectively
be level shifted in a direction, which works to achieve the
load-line regulation required by these manufacturers.
In other cases, the designer may determine that a more
cost-effective solution can be achieved by adding droop. Droop
can help to reduce the output-voltage spike that results from fast
load-current demand changes.
The magnitude of the spike is dictated by the ESR and ESL of the
output capacitors selected. By positioning the no-load voltage level
near the upper specification limit, a larger negative spike can be
sustained without crossing the lower limit. By adding a well
controlled output impedance, the output voltage under load can
effectively be level shifted down so that a larger positive spike can
be sustained without crossing the upper specification limit.
As shown in Figure 11, a current proportional to the average
current of all active channels, I_AVG, flows from FB through a
load-line regulation resistor R_FB, i.e., R₁. The resulting voltage
drop across R_FB is proportional to the output current, effectively
creating an output voltage droop with a steady-state value
defined, as shown in Equation 10:
V_DROOP = I_AVG  R_FB
(EQ. 10)
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FN8575.1
August 13, 2015