ISL6363_14 Datasheet, PDF (23/32 Pages) Intersil Corporation – Multiphase PWM Regulator for VR12™ Desktop CPUs

ISL6363
current-sensing summing network. It is recommended to use
1Ω~10Ω R_o to create quality signals. Since R_o value is much
smaller than the rest of the current sensing circuit, the following
analysis will ignore it for simplicity.
The summed inductor current information is presented to the
capacitor C_n. Equations 19 thru 23 describe the
frequency-domain relationship between inductor total current
I_o(s) and C_n voltage V_Cn(s):
⎛
⎞
V_Cn(s)
=
⎜
⎜
⎜
⎝
-----------^R----ⁿ----^t--^c--ⁿ----^e---^t-----------
R_ntc
ne
t
+
-^R----^s--^u----^m---
N
×
D_-----NC----R_{--⎟⎟⎟}
⎠
× I_o(s) × A_cs(s)
(EQ. 19)
R_ntcnet
=
-⁽--^R----ⁿ---^t--^c---^s----+-----^R----ⁿ---^t--^c---⁾----^×-----^R----^p-
R_ntcs + R_ntc + R_p
(EQ. 20)
A_cs(s)
=
---¹-----+-----^{ω------s----L-----}
1
+
------^s------
ω_sns
(EQ. 21)
ω_L
=
D_-----C_----R_--
L
(EQ. 22)
ω_sns
=
--------------------------¹----------------------------
-^R----ⁿ---^t--^c---ⁿ---^e---^t---^×------^R--------^s---^N--u-------m-------
R_n
t
c
net
+
-^R----^s--^u----^m---
N
×
C_n
Where N is the number of phases.
(EQ. 23)
Transfer function A_cs(s) always has unity gain at DC. The inductor
DCR value increases as the winding temperature increases,
giving higher reading of the inductor DC current. The NTC R_ntc
values decreases as its temperature decreases. Proper
selections of R_sum, R_ntcs, R_p and R_ntc parameters ensure that
V_Cn represent the inductor total DC current over the temperature
range of interest.
There are many sets of parameters that can properly
temperature-compensate the DCR change. Since the NTC network
and the R_sum resistors form a voltage divider, V_cn is always a
fraction of the inductor DCR voltage. It is recommended to have a
higher ratio of V_cn to the inductor DCR voltage, so the droop circuit
has higher signal level to work with.
A typical set of parameters that provide good temperature
compensation are: R_sum = 3.65kΩ, R_p = 11kΩ, R_ntcs = 2.61kΩ and
R_ntc = 10kΩ (ERT-J1VR103J). The NTC network parameters may
need to be fine tuned on actual boards. One can apply full load DC
current and record the output voltage reading immediately; then
record the output voltage reading again when the board has
reached the thermal steady state. A good NTC network can limit the
output voltage drift to within 2mV. It is recommended to follow the
Intersil evaluation board layout and current-sensing network
parameters to minimize engineering time.
V_Cn(s) also needs to represent real-time I_o(s) for the controller to
achieve good transient response. Transfer function A_cs(s) has a
pole w_sns and a zero w_L. One needs to match w_L and w_sns so
A_cs(s) is unity gain at all frequencies. By forcing w_L equal to w_sns
and solving for the solution, Equation 24 gives Cn value.
C_n
=
-----------------------------^L------------------------------
-^R----ⁿ---^t--^c---ⁿ---^e---^t---^×------^R--------^s---^N--u-------m------- × DCR
R_nt
cn
e
t
+
-^R----^s--^u----^m---
N
(EQ. 24)
For example, given N = 3, R_sum = 3.65kΩ, R_p = 11kΩ,
R_ntcs = 2.61kΩ, R_ntc = 10kΩ, DCR = 0.88mΩ and L = 0.36µH,
Equation 24 gives C_n = 0.406µF.
Assuming the compensator design is correct, Figure 17 shows the
expected load transient response waveforms if C_n is correctly
selected. When the load current I_core has a square change, the
output voltage V_CORE also has a square response.
If C_n value is too large or too small, V_Cn(s) will not accurately
represent real-time I_o(s) and will worsen the transient response.
Figure 18 shows the load transient response when C_n is too
small. V_CORE will sag excessively upon load insertion and may
create a system failure. Figure 19 shows the transient response
when C_n is too large. V_CORE is sluggish in drooping to its final
value. There will be excessive overshoot if load insertion occurs
during this time, which may potentially hurt the CPU reliability.
IO
VO
FIGURE 17. DESIRED LOAD TRANSIENT RESPONSE WAVEFORMS
IO
VO
FIGURE 18. LOAD TRANSIENT RESPONSE WHEN C_n IS TOO SMALL
IO
VO
FIGURE 19. LOAD TRANSIENT RESPONSE WHEN C_n IS TOO LARGE
23
FN6898.1
September 5, 2013