ISL6363_14 Datasheet, PDF (18/32 Pages) Intersil Corporation – Multiphase PWM Regulator for VR12™ Desktop CPUs

ISL6363
three sources: its own phase inductor phase-node pad, and the
other two phases inductor output side pads. Equations 8 thru 10
give the ISEN pin voltages:
V_ISEN1 = V_1p + V_2n + V_3n
(EQ. 8)
V_ISEN2 = V_1n + V_2p + V_3n
(EQ. 9)
V_ISEN3 = V_1n + V_2n + V_3p
(EQ. 10)
The ISL6363 will make V_ISEN1 = V_ISEN2 = V_ISEN3 as shown in
Equations 11 and 12:
V_1p + V_2n + V_3n = V_1n + V_2p + V_3n
(EQ. 11)
V_1n + V_2p + V_3n = V_1n + V_2n + V_3p
(EQ. 12)
Rewriting Equation 11 gives Equation 13:
V_1p – V_1n = V_2p – V_2n
(EQ. 13)
and rewriting Equation 12 gives Equation 14:
V_2p – V_2n = V_3p – V_3n
(EQ. 14)
Combining Equations 13 and 14 gives:
V_1p – V_1n = V_2p – V_2n = V_3p – V_3n
(EQ. 15)
Therefore:
R_dcr1 × I_L1 = R_dcr2 × I_L2 = R_dcr3 × I_L3
(EQ. 16)
Current balancing (I_L1 = I_L2 = I_L3) will be achieved when there is
R_dcr1 = R_dcr2 = R_dcr3. R_pcb1, R_pcb2 and R_pcb3 will not have any
effect.
Since the slave ripple capacitor voltages mimic the inductor
currents, the R3 modulator can naturally achieve excellent
current balancing during steady state and dynamic operations.
Figure 12 shows current balancing performance of the
evaluation board with a load transient of 12A/51A at different
rep rates. The inductor currents follow the load current dynamic
change with the output capacitors supplying the difference. The
inductor currents can track the load current well at low rep rate,
but cannot keep up when the rep rate gets into the hundred-kHz
range, where it’s out of the control loop bandwidth. The controller
achieves excellent current balancing in all cases installed.
CCM SWITCHING FREQUENCY
The R_fset resistor between the COMP and the VW pins sets the
VW windows size, therefore sets the switching frequency. When
the ISL6363 is in continuous conduction mode (CCM), the
switching frequency is not absolutely constant due to the nature
of the R3 modulator. As explained in the Multiphase R3
Modulator section on page 11, the effective switching frequency
will increase during load insertion and will decrease during load
release to achieve fast response. On the other hand, the
switching frequency is relatively constant at steady state.
Variation is expected when the power stage condition, such as
input voltage, output voltage, load, etc., changes. The variation is
usually less than 15% and doesn’t have any significant effect on
output voltage ripple magnitude. Equation 17 gives an estimate
of the frequency-setting resistor R_fset value. 8kΩ R_fset gives
approximately 300kHz switching frequency. Lower resistance
gives higher switching frequency.
R_fset(kΩ) = (Period(μs) – 0.29) × 2.65
(EQ. 17)
REP RATE = 10kHz
REP RATE = 25kHz
REP RATE = 50kHz
REP RATE = 100kHz
REP RATE = 200kHz
FIGURE 12. CURRENT BALANCING DURING DYNAMIC OPERATION.
CH1: IL1, CH2: I_LOAD, CH3: IL2, CH4: IL3
18
FN6898.1
September 5, 2013