ISL6363_14 Datasheet, PDF (21/32 Pages) Intersil Corporation – Multiphase PWM Regulator for VR12™ Desktop CPUs

ISL6363
All the above fault conditions can be reset by bringing VR_ON low
or by bringing VCC below the POR threshold. When VR_ON and
VCC return to their high operating levels, a soft-start will occur
Table 5 summarizes the fault protections.
TABLE 5. FAULT PROTECTION SUMMARY
FAULT TYPE
FAULT DURATION
BEFORE
PROTECTION PROTECTION ACTION
FAULT
RESET
Overcurrent
Phase Current
Unbalance
120µs
1ms
PWM tri-state, PGOOD VR_ON
latched low
toggle or
VCC toggle
Way-Overcurrent Immediately
(1.5xOC)
Overvoltage
+200mV
PGOOD latched low.
Actively pulls the
output voltage to
below VID value, then
tri-state.
CURRENT MONITOR
The ISL6363 provides the current monitor function for both VRs.
IMON pin reports VR1 inductor current and IMONG pins reports
VR2 inductor current. Since they are designed following the same
principle, the following discussion will be only based on the IMON
pin but also applies to the IMONG pin.
The IMON pin outputs a high-speed analog current source that is
3 times of the droop current flowing out of the FB pin. Thus
becoming Equation 18:
I_IMON = 3 × I_droop
(EQ. 18)
As the “Simplified Application Circuit” on page 6 shows, a
resistor R_imon is connected to the IMON pin to convert the IMON
pin current to voltage. A capacitor can be paralleled with R_imon
to filter the voltage information.
The IMON pin voltage range is 0V to 2.7V. The controller monitors
the IMON pin voltage and considers that VR1 has reached
ICCMAX on IMON pin voltage is 2.7V.
PSICOMP Function
Figure 15 shows the PSICOMP function. A switch turns on to
short the FB and the PSICOMP pins when the controller is in PS2
mode. The RC network C2.2 and R3.2 is connected in parallel
with R1 and C2/R3 compensation network in PS2/3 mode. This
additional RC network increases the high frequency content of
the signal passing from the output voltage to the COMP pin which
will improve transient response in PS2/3 mode of operation.
CONTROLLER IN
PS0/1 MODE
C2 _R3
C1 _R2
C3.1
CONTROLLER IN
PS2/3 MODE
C2 _R3
C1 _R2
C3.1
VSEN
R1
FB
E/A
C2.2 _R3.2
PSICOMP
VSEN
COMP
R1
FB
C2.2 _R3.2
E/A
COMP
PSICOMP
FIGURE 15. PSICOMP FUNCTION
When the PSICOMP switch is off, C2.2 and R3.2 are
disconnected from the FB pin. However, the controller still
actively drives the PSICOMP pin to allow for smooth transitions
between modes of operation.
The PSICOMP function ensures excellent transient response in
both PS0, PS1 and PS2/3 modes of operation. If the PSICOMP
function is not needed C2.2 and R3.2 can be disconnected.
Adaptive Body Diode Conduction Time
Reduction
In DCM, the controller turns off the low-side MOSFET when the
inductor current approaches zero. During on-time of the low-side
MOSFET, phase voltage is negative and the amount is the
MOSFET r_DS(ON) voltage drop, which is proportional to the
inductor current. A phase comparator inside the controller
monitors the phase voltage during on-time of the low-side
MOSFET and compares it with a threshold to determine the
zero-crossing point of the inductor current. If the inductor current
has not reached zero when the low-side MOSFET turns off, it will
flow through the low-side MOSFET body diode, causing the phase
node to have a larger voltage drop until it decays to zero. If the
inductor current has crossed zero and reversed the direction when
the low-side MOSFET turns off, it will flow through the high-side
MOSFET body diode, causing the phase node to have a spike until
it decays to zero. The controller continues monitoring the phase
voltage after turning off the low-side MOSFET and adjusts the
phase comparator threshold voltage accordingly in iterative steps,
such that the low-side MOSFET body diode conducts for
approximately 40ns to minimize the body diode-related loss.
Supported Data and Configuration Registers
The controller supports the following data and configuration
registers.
TABLE 6. SUPPORTED DATA AND CONFIGURATION
REGISTERS
REGISTER
INDEX
NAME
DESCRIPTION
DEFAULT
VALUE
00h Vendor ID
Uniquely identifies the VR
12h
vendor. Assigned by Intel.
01h Product ID Uniquely identifies the VR
1Fh
product. Intersil assigns this
number.
02h Product
Revision
Uniquely identifies the revision
of the VR control IC. Intersil
assigns this data.
05h Protocol ID Identifies what revision of SVID 01h
protocol the controller supports.
21
FN6898.1
September 5, 2013