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ISL62883C Datasheet, PDF (21/43 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5™ Mobile CPUs and GPUs
ISL62883C
When the ISL62883C is in DE mode, it will actively drive
the output voltage up when the VID changes to a higher
value. The DE mode operation will resume after reaching
the new voltage level. If the load is light enough to
warrant DCM, it will enter DCM after the inductor current
has crossed zero for four consecutive cycles. The
ISL62883C will remain in DE mode when the VID
changes to a lower value. The output voltage will decay
to the new value and the load will determine the slew
rate. Overvoltage protection is blanked during VID down
transition in DE mode until the output voltage is within
60mV of the VID value.
During load insertion response, the Fast Clock function
increases the PWM pulse response speed. The
ISL62883C monitors the VSEN pin voltage and compares
it to 100ns-filtered version. When the unfiltered version
is 20mV below the filtered version, the controller knows
there is a fast voltage dip due to load insertion, hence
issues an additional master clock signal to deliver a PWM
pulse immediately.
The R3™ modulator intrinsically has voltage
feed-forward. The output voltage is insensitive to a fast
slew rate input voltage change.
Protections
The ISL62883C provides overcurrent, current-balance,
undervoltage, overvoltage, and over-temperature
protections.
The ISL62883C determines overcurrent protection
(OCP) by comparing the average value of the droop
current Idroop with an internal current source threshold.
It declares OCP when Idroop is above the threshold for
120µs. A resistor Rcomp from the COMP pin to GND
programs the OCP current source threshold, as well as
the overshoot reduction function in 1-phase
configuration, as Table 4 shows. It is recommended to
use the nominal Rcomp value. The ISL62883C detects
the Rcomp value at the beginning of start-up, and sets
the internal OCP threshold accordingly. It remembers
the Rcomp value until the VR_ON signal drops below the
POR threshold.
TABLE 4. ISL62883C Rcomp PROGRAMMABILITY
3-PHASE 2-PHASE
Rcomp
CONFIG. CONFIG. 1-PHASECONFIG.
MIN NOM MAX
(kΩ) (kΩ) (kΩ)
OCP THRESHOLD
(µA)
OVERSHOOT
REDUCTION
FUNCTION
none none 60
40
60
Disabled
320 400 480
68
45.3
68
210 235 260
62
41.3
62
155 165 175
54
36
54
104 120 136
56
37.33
60
Enabled
78 85 92
58
38.7
68
62 66 70
64
42.7
62
45 50 55
66
44
54
The default OCP threshold is the value when Rcomp is not
populated. It is recommended to scale the droop current
Idroop such that the default OCP threshold gives
approximately the desired OCP level, then use Rcomp to
fine tune the OCP level if necessary.
For overcurrent conditions above 2.5x the OCP level, the
PWM outputs will immediately shut off and PGOOD will
go low to maximize protection. This protection is also
referred to as way-overcurrent protection or
fast-overcurrent protection, for short-circuit protections.
The ISL62883C monitors the ISEN pin voltages to
determine current-balance protection. If the ISEN pin
voltage difference is greater than 9mV for 1ms, the
controller will declare a fault and latch off.
The ISL62883C will declare undervoltage (UV) fault and
latch off if the output voltage is less than the VID set
value by 300mV or more for 1ms. It’ll turn off the PWM
outputs and de-assert PGOOD.
The ISL62883C has two levels of overvoltage
protections. The first level of overvoltage protection is
referred to as PGOOD overvoltage protection. If the
output voltage exceeds the VID set value by +200mV for
1ms, the ISL62883C will declare a fault and de-assert
PGOOD.
The ISL62883C takes the same actions for all of the
above fault protections: de-assertion of PGOOD and
turn-off of the high-side and low-side power MOSFETs.
Any residual inductor current will decay through the
MOSFET body diodes. These fault conditions can be reset
by bringing VR_ON low or by bringing VDD below the
POR threshold. When VR_ON and VDD return to their
high operating levels, a soft-start will occur.
The second level of overvoltage protection is different.
If the output voltage exceeds 1.55V, the ISL62883C will
immediately declare an OV fault, de-assert PGOOD, and
turn on the low-side power MOSFETs. The low-side
power MOSFETs remain on until the output voltage is
pulled down below 0.85V when all power MOSFETs are
turned off. If the output voltage rises above 1.55V
again, the protection process is repeated. This behavior
provides the maximum amount of protection against
shorted high-side power MOSFETs while preventing
output ringing below ground. Resetting VR_ON cannot
clear the 1.55V OVP. Only resetting VDD will clear it. The
1.55V OVP is active all the time when the controller is
enabled, even if one of the other faults have been
declared. This ensures that the processor is protected
against high-side power MOSFET leakage while the
MOSFETs are commanded off.
The ISL62883C has a thermal throttling feature. If the
voltage on the NTC pin goes below the 1.18V OT
threshold, the VR_TT# pin is pulled low indicating the
need for thermal throttling to the system. No other
action is taken within the ISL62883C in response to NTC
pin voltage.
Table 5 summarizes the fault protections.
21
FN7557.1
March 18, 2010