ISL62883C Datasheet, PDF (17/43 Pages) Intersil Corporation – Multiphase PWM Regulator for IMVP-6.5™ Mobile CPUs and GPUs

ISL62883C
TABLE 1. VID TABLE (Continued)
V_O
VID6 VID5 VID4 VID3 VID2 VID1 VID0 (V)
1
1
0
1
1
1
0 0.1250
1
1
0
1
1
1
1 0.1125
1
1
1
0
0
0
0 0.1000
1
1
1
0
0
0
1 0.0875
1
1
1
0
0
1
0 0.0750
1
1
1
0
0
1
1 0.0625
1
1
1
0
1
0
0 0.0500
1
1
1
0
1
0
1 0.0375
1
1
1
0
1
1
0 0.0250
1
1
1
0
1
1
1 0.0125
1
1
1
1
0
0
0 0.0000
1
1
1
1
0
0
1 0.0000
1
1
1
1
0
1
0 0.0000
1
1
1
1
0
1
1 0.0000
1
1
1
1
1
0
0 0.0000
1
1
1
1
1
0
1 0.0000
1
1
1
1
1
1
0 0.0000
1
1
1
1
1
1
1 0.0000
Rdroop
Vdroop
FB
Idroop
VCCSENSE
VR LOCAL
“CATCH” _VO
RESISTOR
COMP
E/A
Σ
DAC
VDAC
INTERNAL
X1
TO IC
VIDs
VID<0:6>
RTN
VSS
VSS_SENSE
“CATCH”
RESISTOR
FIGURE 12. DIFFERENTIAL SENSING AND LOAD LINE
IMPLEMENTATION
As the load current increases from zero, the output
voltage will droop from the VID table value by an amount
proportional to the load current to achieve the load line.
The ISL62883C can sense the inductor current through
the intrinsic DC Resistance (DCR) of the inductors as
shown in Figure 1 on page 10 or through resistors in
series with the inductors as shown in Figure 2 on
page 11. In both methods, capacitor C_n voltage
represents the inductor total currents. A droop amplifier
converts C_n voltage into an internal current source with
the gain set by resistor R_i. The current source is used for
load line implementation, current monitor and
overcurrent protection.
Figure 12 shows the load line implementation. The
ISL62883C drives a current source I_droop out of the FB
pin, described by Equation 1.
I_droop
=
2_----x_----V_----C----n--
R_i
(EQ. 1)
When using inductor DCR current sensing, a single NTC
element is used to compensate the positive temperature
coefficient of the copper winding thus sustaining the load
line accuracy with reduced cost.
I_droop flows through resistor R_droop and creates a
voltage drop as shown in Equation 2.
V_droop = R_droop × I_droop
(EQ. 2)
V_droop is the droop voltage required to implement load
line. Changing R_droop or scaling I_droop can both change
the load line slope. Since I_droop also sets the overcurrent
protection level, it is recommended to first scale I_droop
based on OCP requirement, then select an appropriate
R_droop value to obtain the desired load line slope.
Differential Sensing
Figure 12 also shows the differential voltage sensing
scheme. VCC_SENSE and VSS_SENSE are the remote
voltage sensing signals from the processor die. A unity
gain differential amplifier senses the VSS_SENSE voltage
and add it to the DAC output. The error amplifier
regulates the inverting and the non-inverting input
voltages to be equal as shown in Equation 3:
VC
C_SEN
SE
+
V
d
r
o
o
p
=
V_DAC + VSS_SENSE
(EQ. 3)
Rewriting Equation 3 and substitution of Equation 2 gives
VCC_SENSE – VSS_SENSE = V_DAC – R_droop × I_droop
(EQ. 4)
Equation 4 is the exact equation required for load line
implementation.
The VCC_SENSE and VSS_SENSE signals come from the
processor die. The feedback will be open circuit in the
absence of the processor. As Figure 12 shows, it is
recommended to add a “catch” resistor to feed the VR
local output voltage back to the compensator, and add
another “catch” resistor to connect the VR local output
ground to the RTN pin. These resistors, typically
10Ω~100Ω, will provide voltage feedback if the system is
powered up without a processor installed.
17
FN7557.1
March 18, 2010